OTG_DATA[8]
PIN_H3
OTG_DATA[9]
PIN_H4
OTG_DATA[10]
PIN_G1
OTG_DATA[11]
PIN_G2
OTG_DATA[12]
PIN_G3
OTG_DATA[13]
PIN_F1
OTG_DATA[14]
PIN_F3
OTG_DATA[15]
PIN_G4
OTG_CS_N
PIN_A3
OTG_RD_N
PIN_B3
OTG_WR_N
PIN_A4
OTG_RST_N
PIN_C5
OTG_INT[0]
PIN_A6
OTG_INT[1]
PIN_D5
OTG_DACK_N[0]
PIN_C4
OTG_DACK_N[1]
PIN_D4
OTG_DREQ[0]
PIN_J1
OTG_DREQ[1]
PIN_B4
OTG_FSPEED
PIN_C6
OTG_LSPEED
PIN_B6
4
.
1
8
U
s
i
n
g
I
4
.
1
8
U
s
i
n
g
I
The DE2-115 provides an infrared remote-control receiver Module (model: IRM-V538N7/TR1),
whose datasheet is offered in the DE2_115_datasheets\IR_Receiver folder on DE2-115 system CD.
Note that for this all-in-one receiver module, it is only compatible with the 38KHz carrier Standard,
with a maximum data rate of about 4kbps for its product information. The accompanied remote
controller with an encoding chip of uPD6121G is very suitable of generating expected infrared
signals.
Figure 4-32
associated interface are listed in
ISP1362 Data[8]
ISP1362 Data[9]
ISP1362 Data[10]
ISP1362 Data[11]
ISP1362 Data[12]
ISP1362 Data[13]
ISP1362 Data[14]
ISP1362 Data[15]
ISP1362 Chip Select
ISP1362 Read
ISP1362 Write
ISP1362 Reset
ISP1362 Interrupt 0
ISP1362 Interrupt 1
ISP1362 DMA Acknowledge 0
ISP1362 DMA Acknowledge 1
ISP1362 DMA Request 0
ISP1362 DMA Request 1
USB Full Speed, 0 = Enable, Z = Disable
USB Low Speed, 0 = Enable, Z = Disable
R
R
shows the related schematic of the IR receiver, and the pin assignments of the
Table
4-26.
Figure 4-32 Connection between FPGA and IR
62
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V