Hardware Initialization; Table 28. Pci Configuration Ids And Device Numbers - Intel SE7520AF2 Technical Product Specification

Functional Architecture
configuration cycles. The following table shows the correspondence between IDSEL values and
PCI device numbers for the PCI bus. The lower 5-bits of the device number are used in
CONFIG_ADDRESS bits [15::11].
PCI Device
MCH host-HI bridge/DRAM controller
MCH EXP Bridge A0
MCH EXP Bridge A1
MCH EXP Bridge B0
MCH EXP Bridge B1
MCH EXP Bridge C0
MCH EXP Bridge C1
ICH5R Hub interface to PCI bridge
ICH5R PCI to LPC interface
ICH5R IDE controller
ICH5R Serial ATA
ICH5R SMBus controller
ICH5R USB UHCI controller 1
ICH5R USB UHCI controller 2
ICH5R USB UHCI controller 3
ICH5R USB 2.0 EHCI controller
Slot 1 (PCI-X 64/133)
Slot 3 (PCI EXP x4)
Slot 4 (PCI EXP x8)
Slot 5 (PCI-X 64/133)
Slot 6 (PCI-X 64/100)
Slot 6 (Upper Slot of optional 2-slot riser)
Slot 7 (Lower Slot of optional 2-slot riser)
Intel 82546GB Dual Gb NIC
LSI Logic* 53C1030 Ultra 320 SCSI w/ dual
channel
ATI Rage XL (PCI VGA)
3.5.4

Hardware Initialization

A system based on the "Nocona" / "Irwindale" processor and the lntel® E7520 chipset is
initialized the following manner.
System power is applied. The power-supply provides resets using the PS_GOOD_H signal. The
ICH5-R asserts PCI_RST_L to reset the MCH and the PXH. The MCH asserts CPURST_L to
reset the processor(s).
The "Nocona" / "Irwindale" processor is initialized, with its internal registers set to default values.
Before CPURST_L is de-asserted, the processor asserts BREQ0_L. Processor(s) in the system
80

Table 28. PCI Configuration IDs and Device Numbers

Intel order number C77866-003
Intel® Server Board SE7520AF2 TPS
IDSEL Bus # / Device # / Function #
00 / 00 / 0,1
00 / 02 / 00
00 / 03 / 00
00 / 04 / 00
00 / 05 / 00
00 / 06 / 00
00 / 07 / 00
00 / 30 / 00
00 / 31 / 00
00 / 31 / 01
00 / 31 / 02
00 / 31 / 03
00 / 29 / 00
00 / 29 / 01
00 / 29 / 02
00 / 29 / 07
AD21 01 / 01 /
01 / 04 /
02 / 06 /
AD17 00 / 01 /
AD17 01/ 01 /
AD17 01/ 01 /
AD18 01 / 02 /
P1B_AD20 / 04 / 0,1
P1A_AD21 / 05 / 0,1
PC_AD28 / 12 / 0
Revision 1.2