Microcode; Processor Cache; Hyper-Threading Technology; Intel Speedstep® Technology - Intel SE7520AF2 Technical Product Specification

System BIOS
5.3.7

Microcode

IA32 processors can correct specific errata through the loading of an Intel-supplied data block
(i.e. microcode update). The BIOS is responsible for storing the update in nonvolatile memory
and loading it into each processor during POST. The BIOS allows a number of microcode
updates to be stored in the flash, limited by the amount of free space available. The BIOS
supports variable size microcode updates and it verifies the signature prior to storing the update
in the flash. The system BIOS supports the real mode INT15, D042h interface for updating the
microcode updates in the flash.
5.3.8

Processor Cache

The BIOS enables all levels of processor cache as early as possible during POST. User options
are not available to modify the cache configuration, size or policies. All detected cache sizes are
reported in the SMBIOS Type 7 structures. The largest and highest level cache detected is
reported in BIOS Setup.
5.3.9

Hyper-Threading Technology

Intel® Xeon™ processors support Hyper-Threading Technology. The BIOS detects processors
that support this feature and enables it during POST. BIOS Setup provides an option to
selectively enable or disable this feature. The default behavior is enabled.
The BIOS creates additional entries in the ACPI MP tables to describe the virtual processors.
The SMBIOS Type 4 structure shows only the physical processors installed. It does not
describe the virtual processors.
Because some operating systems are not able to efficiently utilize the Hyper-Threading
Technology, the BIOS does not create entries in the MP tables to describe the virtual
processors.
5.3.10 Intel SpeedStep® Technology
Intel® Xeon™ processors support the "Geyserville3" (GV3) feature of Intel SpeedStep®
Technology. This feature changes the processor operating ratio and voltage similar to the
Thermal Monitor 2 (TM2) feature. The E7520 platforms support GV3 feature in conjunction with
TM2 feature.
5.3.11 Intel® Extended Memory 64 Technology (Intel® EM64T)
The system BIOS on the Intel® Server Board SE7520AF2 supports the Intel® Extended
Memory 64 Technology (Intel® EM64T) capability of the Intel® Xeon™ processors. This
capability does not need to be activated or de-activated in BIOS Setup. The system is in IA32
compatibility mode when booting an operating system.
5.4

Memory Initialization

The following section describes the memory initialization performed by the Intel® SE7520AF2
Server BIOS.
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Intel order number C77866-003
Intel® Server Board SE7520AF2 TPS
Revision 1.2