Lattice Semiconductor ispClock5400D User Manual page 25

Lattice Semiconductor
The ispClock5406D can also be driven from an external differential clock source by moving the zero-ohm resistor
from the R35 location to the R37 location and connecting the clocks to both REFB_N and REFB_P inputs (J1 and
J2). When an external clock source is used, switches 1 and 2 of DIP-switch SW1 (Appendix A, Figure 34) should
be in the left position to disable both on-board oscillators. When an external clock is used for REFB_P (J2), zero
ohm resistors must be used for R13 and R11 and R10 should be removed. If an external clock is used for REFB_N
(J1), then zero ohm resistors must be used for R14 and R12, and R15, R9, R7, and R5 should be removed.
On-Board Termination
The ispClock5400D Evaluation Board is designed to support a variety of on-board termination schemes. The board
comes from the factory with zero-ohm jumpers in place of the on-board termination in order to support off-board
termination and quick validation of designs with an oscilloscope. In this section we will detail the various termina-
tion schemes using output Bank-0 as the example. The other three output banks have similar circuits and reference
numbering to promote ease of use.
At first glance, the schematic shown in Appendix A, Figure 36 (or any sheet containing the output bank schematics)
appears to have too many parts between the ispClock5406D outputs and the SMA connectors. However, only
some of the parts are required for any particular output mode. So, for any given output mode there will be several
unpopulated parts. Each output mode will be covered in detail in the following sections.
All the passive devices used in the termination have SMD 0605 footprints. R28 and R29 are not mislabeled, in
more cases the positions are populated with resistors but, in other cases DC blocking capacitors. The on-board T-
Line and termination networks support differential viewing of the signal at the end of the T-Line. In cases where
only one output of the signal is to be viewed (connected to a scope) the other output should be terminated with a
similar length of cable and a 50 ohm terminator.
LVDS
Low Voltage Differential Signal (LVDS) termination requires 100 ohms differential at the end of the transmission
line. The network shown at the end of the T-line in Figure 26 provides the required termination impedance and
sends a portion of the waveform off board to a scope. The sum of R23, R25, R26, and R24 add up to 110 ohms
which is 10 ohms too much. However, the AC coupling provided by R28, and R29 brings the scope impedance and
the series resistors R30 and R31 in parallel with R25 and R26 (168 || 44 = 34.87). This effectively lowers the
impedance seen at the end of the T-line to about 101 ohms and provides a divider network to sample the signal at
the scope without causing reflections or an impedance miss-match. The divider ratio is about 4.75:1 and can be
verified by measuring the voltage at the end of the T-line with an amplified high frequency probe on the scope.
Figure 26. Bank 0 LVDS with On-Board Termination
ispClock
LVDS
Buffers
MLVDS
Multi-drop LVDS (MLVDS) termination incorporates a differential source termination resistor in addition to standard
LVDS termination. Figure 27 shows R18 providing the source termination at the driven side of the T-Line. At the
receiving end of the on-board T-Line, the termination and scope sense circuit is identical to that of LVDS circuit dis-
cussed above.
On Board T-Line
R16 R23
50 ohms / 64.3 mm
0 33
On Board T-Line
R17 R24
5 0 o h m s / 6 4 3 . m m
0 33
ispClock5406D Standard Evaluation Board
ispClock5400D Evaluation Board
BANK_0P
J3
SMA to BNC Cable
R28
R30
50 ohms / 91 cm
34
R25
0.1uF
22
R26
SMA to BNC Cable
R29
22
R31
5 0 o
34
0.1uF
J4
BANK_0N
25
User's Guide
Scope
50
5pF
50
h m s / 9 1 c m
5pF