7
Primary PCI Bus Interface 64-Bit Extension Signals ..................................................................26
8
Secondary PCI Bus Interface Signals.........................................................................................28
9
Secondary PCI Bus Interface 64-Bit Extension Signals .............................................................30
10 Miscellaneous Signals ................................................................................................................31
12 Bar Summary..............................................................................................................................47
15 Prefetch Boundaries ...................................................................................................................58
17 Power Management, Hot-Swap, and Reset Signals...................................................................65
18 Reset Mechanisms .....................................................................................................................67
20 Primary and Secondary PCI Bus Clock Signals .........................................................................77
21 PROM Interface Signals .............................................................................................................82
22 SROM Interface Signals .............................................................................................................91
23 Primary PCI Bus Arbitration Signals ...........................................................................................97
24 Secondary PCI Bus Arbitration Signals ......................................................................................97
25 Arbiter Control Register ............................................................................................................100
26 Primary and Secondary PCI Bus Interrupt Signals...................................................................101
27 Primary PCI Bus Error Signals .................................................................................................105
28 Secondary PCI Bus Arbitration Signals ....................................................................................106
29 Parity Error Responses.............................................................................................................107
30 JTAG Signals............................................................................................................................111
33 CSR Address Map ....................................................................................................................126
40 Upstream Memory 2 Bar...........................................................................................................135
49 Configuration CSR....................................................................................................................143
52 I/O Own Bits Registers .............................................................................................................145
53 I/O CSR ....................................................................................................................................146
21555 Non-Transparent PCI-to-PCI Bridge User Manual
Contents
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