Intel 87C196CA Supplement To User’s Manual page 4

Microcontroller
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8XC196L X SUPPLEMENT
CHAPTER 6
6.1
SSIO 0 CLOCK REGISTER........................................................................................... 6-1
6.2
SSIO 1 CLOCK REGISTER........................................................................................... 6-2
CHAPTER 7
7.1
EPA FUNCTIONAL OVERVIEW ................................................................................... 7-1
7.1.1
EPA Mask Registers .................................................................................................7-4
7.1.2
EPA Pending Registers ............................................................................................7-5
7.1.3
EPA Interrupt Priority Vector Register .......................................................................7-6
CHAPTER 8
8.1
J1850 FUNCTIONAL OVERVIEW................................................................................. 8-1
8.2
J1850 CONTROLLER SIGNALS AND REGISTERS..................................................... 8-3
8.3
J1850 CONTROLLER OPERATION ............................................................................. 8-4
8.3.1
Control State Machine ..............................................................................................8-4
8.3.1.1
Cyclic Redundancy Check Generator ..................................................................8-4
8.3.1.2
Bus Contention .....................................................................................................8-5
8.3.1.3
Bit Arbitration ........................................................................................................8-5
8.3.1.4
Error Detection .....................................................................................................8-5
8.3.2
Symbol Synchronization and Timing Circuitry ...........................................................8-5
8.3.2.1
Clock Prescaler ....................................................................................................8-6
8.3.2.2
Digital Filter ..........................................................................................................8-6
8.3.2.3
Delay Compensation ............................................................................................8-6
8.3.2.4
Symbol Encoding and Decoding ..........................................................................8-6
8.3.3
Bit Arbitration Example .............................................................................................8-7
8.4
MESSAGE FRAMES ..................................................................................................... 8-8
8.4.1
Standard Messaging .................................................................................................8-9
8.4.1.1
Header .................................................................................................................8-9
8.4.1.2
CRC Byte .............................................................................................................8-9
8.4.1.3
Normalization Bit ..................................................................................................8-9
8.4.1.4
Start and End Message Frame Symbols ............................................................8-10
8.4.2
In-frame Response Messaging ...............................................................................8-12
8.4.2.1
IFR Messaging Type 1: Single Byte, Single Responder ....................................8-12
8.4.2.2
IFR Messaging Type 2: Single Byte, Multiple Responders ................................8-12
8.4.2.3
IFR Messaging Type 3: Multiple Bytes, Single Responder ................................8-13
8.5
TRANSMITTING AND RECEIVING MESSAGES ....................................................... 8-13
8.5.1
Transmitting Messages ...........................................................................................8-13
8.5.2
Receiving Messages ...............................................................................................8-15
8.5.3
IFR Messages .........................................................................................................8-16
iv

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