Table of Contents
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Non-Core Errata
Steppings
No.
Page
A-0
1
X
20
2
X
20
3
X
21
4
X
21
5
X
21
6
X
22
7
X
22
8
X
23
Specification Update
Status
The ATU Returns Invalid Data for the DWORD that Target Aborted from the MCU when
NoFix
Using 32-Bit Memory, ECC Enabled and in PCI Mode
NoFix
PBI Issue When Using 16-bit PBI Transactions in PCI Mode
NoFix
MCU Pointers are Incorrect following a Restoration from a Power Fail
PMU Does Not Account for when the Arbiter Deasserts GNT# One Cycle before
NoFix
FRAME#
NoFix
Lost Data During Bursts of Large Number of Partials with 32-bit ECC Memory
The MTTR1 (Core Multi-Transaction Timer) is not operating due to improper behavior of
NoFix
the core internal bus request signal (REQ#)
NoFix
The MCU supports a page size of 2 Kbytes for 64-bit mode
NoFix
Vih Minimum Input High Voltage (Vih) level for the PCI pins
®
Intel
80219 General Purpose PCI Processor
Summary Table of Changes
Errata
9
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