Digital Thermal Sensor - Intel 5400 Series Design Manuallines

processor operating frequency (via the bus multiplier) and input voltage (via the VID
signals). Please refer to the Quad-Core Intel® Xeon® Processor 5400 Series Datasheet
for further details on TM and TM2.
PROCHOT# is designed to assert at or a few degrees higher than maximum T
specified by the thermal profile) when dissipating TDP power, and can not be
interpreted as an indication of processor case temperature. This temperature delta
accounts for processor package, lifetime, and manufacturing variations and attempts to
ensure the Thermal Control Circuit is not activated below maximum T
dissipating TDP power. There is no defined or fixed correlation between the PROCHOT#
assertion temperature and the case temperature. However, with the introduction of the
Digital Thermal Sensor (DTS) on the Quad-Core Intel® Xeon® Processor 5400 Series,
the DTS reports a relative offset below the PROCHOT# assertion (see
more details on the Digital Thermal Sensor). Thermal solutions must be designed to the
processor specifications (i.e Thermal Profile) and can not be adjusted based on
experimental measurements of T
random processor samples.
By taking advantage of the Thermal Monitor features, system designers may reduce
thermal solution cost by designing to the Thermal Design Power (TDP) instead of
maximum power. TDP should be used for processor thermal solution design targets.
TDP is not the maximum power that the processor can dissipate. TDP is based on
measurements of processor power consumption while running various high power
applications. This data set is used to determine those applications that are interesting
from a power perspective. These applications are then evaluated in a controlled
thermal environment to determine their sensitivity to activation of the thermal control
circuit. This data set is then used to derive the TDP targets published in the processors
datasheet. The Thermal Monitor can protect the processors in rare workload excursions
above TDP. Therefore, thermal solutions should be designed to dissipate this target
power level. The thermal management logic and thermal monitor features are
discussed in extensive detail in the Quad-Core Intel® Xeon® Processor 5400 Series
Datasheet.
In addition, on-die thermal management features called THERMTRIP# and FORCEPR#
are available on the Quad-Core Intel® Xeon® Processor 5400 Series. They provide a
thermal management approach to support the continued increases in processor
frequency and performance. Please see the Quad-Core Intel® Xeon® Processor 5400
Series Datasheet for guidance on these thermal management features.
2.2.2

Digital Thermal Sensor

The Quad-Core Intel® Xeon® Processor 5400 Series include on-die temperature
sensor feature called Digital Thermal Sensor (DTS). The DTS uses the same sensor
utilized for TCC activation. Each individual processor is calibrated so that TCC activation
occurs at a DTS value of 0. The temperature reported by the DTS is the relative offset
in PECI counts below the onset of the TCC activation and hence is negative. Changes in
PECI counts are roughly linear in relation to temperature changes in degrees Celsius.
For example, a change in PECI count by '1' represents a change in temperature of
approximately 1°C. However, this linearity cannot be guaranteed as the offset below
TCC activation exceeds 20-30 PECI counts. Also note that the DTS will not report any
values above the TCC activation temperature, it will simply return 0 in this case.
The DTS facilitates the use of multiple thermal sensors within the processor without the
burden of increasing the number of thermal sensor signal pins on the processor
package. Operation of multiple DTS will be discussed in more detail in
Also, the DTS utilizes thermal sensors that are optimally located when compared with
thermal diodes available with legacy processors. This is achieved as a result of a
20
Thermal/Mechanical Reference Design
, PROCHOT#, or Digital Thermal Sensor on
CASE
Quad-Core Intel® Xeon® Processor 5400 Series TMDG
(as
CASE
when
CASE
Section 2.2.2 for
Section 2.2.4.