Interrupt Servicing Operations; Non-Maskable Interrupt Request Acknowledge Operation - NEC PD78081(A) User Manual

8-bit single-chip microcontroller
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12.4 Interrupt Servicing Operations

12.4.1 Non-maskable interrupt request acknowledge operation

A non-maskable interrupt request is unconditionally acknowledged even if in an interrupt request acknowledge
disable state. It does not undergo interrupt priority control and has highest priority over all other interrupts.
If a non-maskable interrupt request is acknowledged, the contents of program status word (PSW) and program
counter (PC), in that order, are saved to the stack, the IE flag and ISP flag are reset (0), and the contents of the vector
table are loaded in the PC and branched.
A new non-maskable interrupt request generated during execution of a non-maskable interrupt servicing program
is acknowledged after the current execution of the non-maskable interrupt servicing program is terminated (following
RETI instruction execution) and one main routine instruction is executed. If a new non-maskable interrupt request
is generated twice or more during non-maskable interrupt service program execution, only one non-maskable interrupt
request is acknowledged after termination of the non-maskable interrupt service program execution.
The flowchart showing the flow from non-maskable interrupt request generation to acknowledgment is shown in
Figure 12-8, the non-maskable interrupt request acknowledge timing is shown in Figure 12-9, and acknowledge
operation in the case where multiple non-maskable interrupt requests are generated, is shown in Figure 12-10.
CHAPTER 12 INTERRUPT FUNCTION
181

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