Table 2.3:Interrupt Control Register Bit Map - Advantech UNO-2050G User Manual

Lx800 500mhz automation computer with 2 x lan, 2 x rs-232, 2 x isolated rs-232/422/485,16 x isolated di/o
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Interrupt Function of the DI Signals
DI0 and DI1 can be used to generate hardware interrupts. A user can
setup the configuration of interrupts by programming the interrupt control
register.
The channels are connected to the interrupt circuitry. Users can disable/
enable interrupt function, select trigger type or latch the port data by set-
ting the Interrupt Control Register of the UNO-2050G. When the inter-
rupt request signals occur, then the software will service these interrupt
requests by ISR (Interrupt Service Routine). The multiple interrupt
sources provide the card with more capability and flexibility.
IRQ Level
The IRQ level is set automatically by the system BIOS. There is no need
for users to set the IRQ level. Only one IRQ level is used although it has
several interrupt sources.
Interrupt Control Register
The Interrupt Control Register controls the function and status of each
interrupt signal source. Table 2-3 shows the bit map of the Interrupt Con-
trol Register. The register is readable/writable register. While being writ-
ten, it is used as a control register; and while being read, it is used as a
status register
Table 2.3: Interrupt Control Register Bit Map
Base Address
Base+02H R/W
Base+03H R/W
Base+07H R/W
DI0EN & DI1EN: DI0 & DI1 Interrupt disable/enable control bit
DI0TE & DI1TE: DI0 & DI1 Interrupt triggering edge control bit
DI0F & DO1F: DI0 & DI1 interrupt flag bit
7
6
5
4
Interrupt Enable Control/Status Register
Interrupt Triggering Edge Control/Status Register
Interrupt Flag/Clear Register
11
3
2
1
DI1EN
DI1TE
DI1F
0
DI0EN
DI0TE
DI0F
Chapter 2

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