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HMOS processing has been applied to the UPI family
to allow for additional performance and memory capa-
bility while reducing costs The UPI-41A 41AH 42
42AH are all pin and software compatible This allows
growth in present designs to incorporate new features
and add additional performance For new designs the
additional memory and performance of the UPI-
41A 41AH 42 42AH extends the UPI 'grow your
own solution' concept to more complex motor control
tasks 80-column printers and process control applica-
tions as examples
The 8243 device is an I O multiplexer which allows
expansion of I O to over 100 lines (if seven devices are
used) All three parts are fabricated with N-channel
MOS technology and require a single 5V supply for
operation
INTERFACE REGISTERS FOR MULTI-
PROCESSOR CONFIGURATIONS
In the normal configuration the UPI-41A 41AH 42
42AH interfaces to the system bus just like any intelli-
gent peripheral device (see Figure 1-1) The host proc-
essor and the UPI-41A 41AH 42 42AH form a loose-
ly coupled multi-processor system that is communica-
tions between the two processors are direct Common
resources are three addressable registers located physi-
cally on the UPI-41A 41AH 42 42AH These reg-
Figure 1-1 Interfacing Peripherals To Microcomputer Systems
UPI-41A 41AH 42 42AH USER'S MANUAL
isters are the Data Bus Buffer Input (DBBIN) Data
Bus Buffer Output (DBBOUT) and Status (STATUS)
registers The host processor may read data from
DBBOUT or write commands and data into DBBIN
The status of DBBOUT and DBBIN plus user-defined
status is supplied in STATUS The host may read
STATUS at any time An interrupt to the UPI proces-
sor is automatically generated (if enabled) when
DBBIN is loaded
Because the UPI contains a complete microcomputer
with program memory data memory and CPU it can
function as a ''Universal'' controller A designer can
program the UPI to control printers tape transports or
multiple serial communication channels The UPI can
also handle off-line arithmetic processing or any num-
ber of other low speed control tasks
POWERFUL 8-BIT PROCESSOR
The UPI contains a powerful 8-bit CPU with as fast as
1 2 msec cycle time and two single-level interrupts Its
instruction set includes over 90 instructions for easy
software development Most instructions are single byte
and single cycle and none are more than two bytes long
The instruction set is optimized for bit manipulation
and I O operations Special instructions are included to
allow binary or BCD arithmetic operations table look-
up routines loop counters and N-way branch routines
231318 –1
3
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