Intel UPI- 41A User Manual page 69

Four PORT 2 lines function as general I O similar to
PORT 1 Also the RTS signal is generated on PORT 2
under software control when the UPI has serial data to
send The CTS signal is monitored via PORT 2 as an
enable to the UPI to send serial data A PORT 2 line is
also used as a software generated interrupt to the mas-
ter processor The interrupt functions as a service re-
quest when the UPI has a byte of data to transfer or
when it is ready to receive Alternatively the EN
FLAGS instruction could be used to create the OBF
and IBF interrupts on P and P
24
The RS232C interface is implemented using the TEST
0 pin as a receive input and a PORT 2 pin as a transmit
output External packages (A
RS232C drive requirements The serial receive software
is interrupt driven and uses the on-chip timer to per-
form time critical serial control After a start bit is de-
tected the interval timer can be preset to generate an
interrupt at the proper time for sampling the serial bit
stream This eliminates the need for software timing
25
A ) are used to provide
0 1
Figure 6-4 Universal I O Interface
UPI-41A 41AH 42 42AH USER'S MANUAL
loops and allows the processor to proceed to other tasks
(i e parallel I O operations) between serial bit sam-
ples Software flags are used so the main program can
determine when the interrupt driven receive program
has a character assembled for it
This type of configuration allows system designers flex-
ibility in designing custom I O interfaces for specific
serial and parallel I O applications For instance a sec-
ond or third serial channel could be substituted in place
of the parallel I O if required The UPI's data memory
can buffer data and commands for up to 4 low-speed
channels (110 baud teletypewriter etc )
Application Notes
The following application notes illustrate the various
applications of the UPI family Other related publica-
tions including the Microcontroller Handbook are avail-
able through the Intel Literature Department
231318 –46
65