Intel UPI- 41A User Manual page 55

Microprocessor peripherals
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SWAP A Swap Nibbles Within Accumulator
Opcode
0 1 0 0
Bits 0 – 3 of the accumulator are swapped with bits 4-7 of the accumulator
(A
)
4–7
Example
Pack bits 0 – 3 of locations 50-51 into location 50
PCKDIG MOV R0
XCH ARr Exchange Accumulator-Register Contents
Opcode
0 0 1 0
The contents of the accumulator and the contents of working register 'r' are exchanged
(A)
Example
Move PSW contents to Reg 7 without losing accumulator contents
XCHAR7 XCH A R7
XCH A
Rr Exchange Accumulator and Data Memory Contents
Opcode
0 0 1 0
The contents of the accumulator and the contents of the data memory location addressed by
bits 0 – 7 of register 'r' are exchanged Register 'r' contents are unaffected
(A)
Example
Decrement contents of location 52
DEC 52 MOV R0
0 1 1 1
(A
)
0–3
50
MOV R1
51
XCHD A
R0
SWAP A
XCHD A
R1
MOV
R0 A
1 r
r
r
2
1
0
(Rr)
MOV A PSW
XCH A R7
0 0 0 r
((Rr))
52
XCH A
R0
DEC A
XCH A
R0
UPI-41A 41AH 42 42AH USER'S MANUAL
MOVE '50' DEC TO REG 0
MOVE '51' DEC TO REG 1
EXCHANGE BIT 0 – 3 OF ACC
AND LOCATION 50
SWAP BITS 0 – 3 AND 4 – 7 OF ACC
EXCHANGE BITS 0 – 3 OF ACC AND
LOCATION 51
MOVE CONTENTS OF ACC TO
LOCATION 51
r
0– 7
e
EXCHANGE CONTENTS OF REG 7
AND ACC
MOVE PSW CONTENTS TO ACC
EXCHANGE CONTENTS OF REG 7
AND ACC AGAIN
r
0– 1
e
MOVE '52' DEC TO ADDRESS
REG 0
EXCHANGE CONTENTS OF ACC
AND LOCATION 52
DECREMENT ACC CONTENTS
EXCHANGE CONTENTS OF ACC
AND LOCATION 52 AGAIN
51

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