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The UPI microcomputer is an intelligent peripheral
controller designed to operate in iAPX-86 88 MCS-85
MCS-80 MCS-51 and MCS-48 systems The UPI's ar-
chitecture illustrated in Figure 2-1 is based on a low
cost single-chip microcomputer with program memo-
ry data memory CPU I O event timer and clock os-
cillator in a single 40-pin package Special interface reg-
isters are included which enable the UPI to function as
a peripheral to an 8-bit master processor
This chapter provides a basic description of the UPI
microcomputer and its system interface registers Un-
less otherwise noted the descriptions in this section ap-
ply to the 8741AH 8742AH with OTP EPROM mem-
Figure 2-1 UPI-41A 41AH 42 42AH Single Chip Microcomputer
CHAPTER 2
FUNCTIONAL DESCRIPTION
UPI-41A 41AH 42 42AH USER'S MANUAL
ory the 8741A 8742 (with UV erasable program mem-
ory) and the 8041AH 8042AH These devices are so
similar that they can be considered identical under
most circumstances All functions described in this
chapter apply to the UPI-41A 41AH 42 42AH
PIN DESCRIPTION
The UPI-41A 41AH 42 42AH are packaged in 40-pin
Dual In-Line (DIP) packages The pin configuration
for both devices is shown in Figure 2-2 Figure 2-3 illus-
trates the UPI Logic Symbol
231318 – 6
7
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