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PX915P4C/ PX915G4C Series
DRAM RAS# to CAS# Delay
This item allows you to select a delay time between the CAS and RAS strobe signals. It only applies
when DRAM is written to, read from, or refreshed. This field is adjustable only when "DRAM Timing
Selectable" is set to "manual". This field is locked when "DRAM Timing Selectable" is set to "By SPD"
and is automatically determined by the system.
Options: 4、3、2
DRAM RAS# Precharge
This item allows you to select the DRAM RAS# precharge time. The ROW address strobe must precharge
again before DRAM is refreshed. An inadequate configuration may result in incomplete data. This field
is adjustable only when "DRAM Timing Selectable" is set to "manual". This field is locked when "DRAM
Timing Selectable" is set to "By SPD" and is automatically determined by the system. Options: 4、3、
2
Precharge Delay
This item allows you to select DRAM Active to Precharge Delay. This field is locked when "DRAM Timing
Selectable" is set to "By SPD" and is automatically determined by the system. Options: 8、7、6、5
System BIOS Cacheable
When enabled, accesses to system BIOS ROM addressed at F0000H-FFFFFH are cached, provided that
the cache controller is enabled. Options: Enabled (default), Disabled
Video BIOS Cacheable
Select "Enabled" to allow caching of the video BIOS which may improve performance. If any other
program writes to this memory area, a system error may result. Options: Enabled, Disabled (default)
Memory Hole at 15M-16M
When enabled, you can reserve an area of system memory for ISA adapter ROM. When this area is
reserved, it cannot be cached. Refer to the user documentation of the peripheral you are installing for
more information. Options: Disabled (default)、Enabled
PCI Express Root Port Func
PCI Express Port1/2
This item allows you to enabled or disabled PCI Express x 1 port 1/ 2.
Options: Auto (default)、Disabled
PCI-E Compliancy Mode
This item allows you select the PCI-E Compliancy Mode. Options: V1.0a (default)、V1.0
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