Interface Timing; Timing Characteristics; Table 3.2: Timing Characteristics(For Idk-1110R-40Sva1E); Table 3.3: Timing Characteristics(For Idk-1110R-23Sva1E) - Advantech IDK-1110R-series User Manual

B7
B6
B5
B4
B3
B2
B1
B0
RxCLKIN
DE
Note: Output signals from any system shall be low or Hi-Z state when VDD is off.
3.4

Interface Timing

3.4.1

Timing Characteristics

DE mode only (For IDK-1110R-40SVA1E)

Table 3.2: Timing Characteristics(For IDK-1110R-40SVA1E)

Parameter
Clock frequency
Period
Vertical
Active
Section
Blanking
Period
Horizontal
Active
Section
Blanking
DE mode only (For IDK-1110R-23SVA1E)

Table 3.3: Timing Characteristics(For IDK-1110R-23SVA1E)

Parameter
Clock frequency
Period
Vertical
Active
Section
Blanking
Period
Horizontal
Active
Section
Blanking
Note Frame rate is 60 Hz.
Note DE mode.
IDK-1110R User Manual
Blue Data 7
Blue Data 6
Blue-pixel Data
Blue Data 5
For 8 bits LVDS input,
Blue Data 4
MSB: B7; LSB:B0
Blue Data 3
Blue Data 2
For 6 bits LVDS input,
MSB: B5; LSB:B0
Blue Data 1
Blue Data 0
LVDS Data Clock
Data Enable Signal When the signal is high, the pixel data shall be
valid to be displayed.
Symbol Min.
1/ T 30
Clock
T 608
V
T -
V
T 8
V
T 960
H
T -
H
T 160
H
Symbol Min.
1/ T 30
Clock
T 608
V
T -
V
T 8
V
T 960
H
T 160
H
T 50
H
18
Typ. Max. Unit
40 50 MHz
628 1024
600 - T
H
28 424
1056 1060
800 - T
Clock
256 260
Typ. Max. Unit
40 50 MHz
628 1024
600 - T
H
28 424
1056 1060
256 260 T
Clock
60 75
Condition
Condition