Interface Timing; Timing Characteristics - Advantech IDK-1108R-45SVA1E User Manual

Tft-lcd 8.4" svga (led backlight)
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B7
B6
B5
B4
B3
B2
B1
B0
RxCLKIN+
RxCLKIN-
DE
VS
HS
Note: Output signals from any system shall be low or Hi-Z state when VDD is off.
3.3

Interface Timing

3.3.1

Timing Characteristics

DE mode only
Table 3.2: Timing Characteristics
Parameter
Clock frequency
Period
Vertical
Active
Section
Blanking
Period
Horizontal
Active
Section
Blanking
Note Frame rate is 60 Hz.
Note DE mode.
IDK-1108R User Manual
Blue Data 7 (MSB)
Blue Data 6
Blue Data 5
Blue-pixel Data
Blue Data 4
Each blue pixel's brightness data consists of
Blue Data 3
these 8 bits pixel data.
Blue Data 2
Blue Data 1
Blue Data 0 (LSB)
LVDS Clock Input
Display Enable
Vertical Sync
Horizontal Sync
Symbol Min.
1/ T
33.6
Clock
T
608
V
T
600
VD
T
8
VB
T
920
H
T
800
HD
T
HB
12
Typ.
Max.
Unit
39.8
48.3
MHz
628
650
600
600
T
H
28
50
1056
1240
800
800
T
Clock

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