Interface Timing; Timing Characteristics; Input Timing Diagram - Advantech IDK-2110R XGA Series User Manual

Note: Output signals from any system shall be low or Hi-Z state when VDD is off.
3.4

Interface Timing

3.4.1

Timing Characteristics

DE mode only
Table 3.2: Timing Characteristics
Parameter
Clock frequency
Period
Vertical
Active
Section
Blanking
Period
Horizontal
Active
Section
Blanking
Note1 If the refresh rate reaches less than the Min. value, deterioration of the dis-
play - quality, flicker etc, may occur.
Note2 DE mode.
3.4.2

Input Timing Diagram

Symbol Min. Typ.
1/ T 52 65
Clock
T 778 806
V
T - 768
V
T 10 38
V
T 1,114 1,344
H
T - 1024
H
T 90 320
H
15
Max. Unit Condition
71 MHz
845
- T
H
1,400
- T
Clock
IDK-2110R XGA User Manual