Figure 34. Architecture Overview - Intel SR1500 - AXXMINIDIMM DDR-2 RAID Controller Cache Memory Manual

Intel® Server System SR2500AL
6.4.3.1 Architectural Overview
6.4.3.2 x4 PCIe* Card Edge Interfaces
Two x4 PCIe* card edges are used to connect the active mid-plane to the hot-swap backplane.
See Table 22. Mid-plane-to-Backplane Card Edge Connector #1 Pin-out and Table 23. Mid-
plane-to-Backplane Card Edge Connector #2 Pin-out for details. The use of card edge
connectors to the back plane eliminates all hard drive cabling.
6.4.3.3 IOP80333 IO processor
The Intel 80333 IO processor is a multi-function device that integrates the Intel Xscale
with intelligent peripherals and two PCIe* to PCI-X* bridges. It will be connected to the server
board's x4 PCIe lane and serve as bridge for PCI-X 133MHz secondary bus. The IOP80333
also includes fully functional RAID support.
6.4.3.4 LSI* LSISAS1068 SAS Controller
The LSI* LSISAS1068 controller resides on the Channel A PCI-X bus of the IOP80333
supporting transfer rates of up to 3GB/s. It includes an Address Translation Unit (ATU)
supporting transactions between PCI address space and 80333 address space. Address
translation for the ATU is controlled through programmable registers accessible from both the
PCI interface and the Intel Xscale
ROM and NVSRAM to support SAS only software RAID. Software RAID Levels supported
include 0, 1, and 10.
Revision – 1.6
Figure 36. Architecture Overview
®
core. The LSISAS1068 controller includes its own Flash
Intel order number D31980-009
5BPeripheral and Hard Drive Sub-System
®
core
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