EUROCOM M350C Service Manual page 83

Schematic Diagrams
ICH4-1 (1 of 3)
Sheet 11 of 29
ICH4-1
(1 of 3)
[5,6,16,17,18,19,20,21,24,27]
[8,10,14]
[8,10,14]
B - 12 ICH4-1 (1 of 3) (71-M3500-D02)
+3VS [3,5,6,7,8,10,11,13,14,16,17,18,19,21,23,26,27,28]
+VCCRTC [13,14]
+2.5V [4,5,7,8,18,22]
+1.5VS [4,5,6,7,13,14,26,27]
+3V [3,13,14,16,18,20,21,22,24,25,26]
+1.8VS [4]
BGA2A
ICH4-M PART A
[18,20,24] PCI_AD[31:0]
PCI_AD0 H5
PCI_AD0
PCI_AD1 J3 System Manamement I/F
PCI_AD1
PCI_AD2 H3
PCI_AD2
PCI_AD3 K1
PCI_AD3
PCI_AD4 G5
PCI_AD4
PCI_AD5 J4
PCI_AD5
PCI_AD6 H4
PCI_AD6
PCI_AD7 J5
PCI_AD7
PCI_AD8 K2
PCI_AD8
PCI_AD9 G2
PCI_AD9
PCI_AD10 L1
PCI_AD10
PCI_AD11 G4
PCI_AD11
PCI_AD12 L2
PCI_AD12
PCI_AD13 H2
PCI_AD13
PCI_AD14 L3
PCI_AD14
PCI_AD15 F5
PCI_AD15
PCI_AD16 F4
PCI_AD16
PCI_AD17 N1
PCI_AD17
PCI_AD18 E5
PCI_AD18
PCI_AD19 N2
PCI_AD19
PCI_AD20 E3
PCI_AD20
PCI_AD21 N3
PCI_AD21
PCI_AD22 E4
PCI_AD22
PCI_AD23 M5
PCI_AD23
PCI_AD24 E2
PCI_AD24
PCI_AD25 P1
PCI_AD25
PCI_AD26 E1
PCI_AD26
PCI_AD27 P2
PCI_AD27
PCI_AD28 D3
PCI_AD28
PCI_AD29 R1
PCI_AD29
PCI_AD30 D2
PCI_AD30
PCI_AD31 P4
PCI_AD31
J2
[18,20,24] PCI_C/BE0# PCI_C/BE0#
K4
[18,20,24] PCI_C/BE1#
PCI_C/BE1#
M4
[18,20,24] PCI_C/BE2# PCI_C/BE2#
N4
[18,20,24] PCI_C/BE3#
PCI_C/BE3#
PCI_GNT0# C1
[24] PCI_GNT0#
PCI_GNT0#
E6
[20] PCI_GNT1# PCI_GNT1#
A7
[18] PCI_GNT2#
PCI_GNT2#
Z1201 B7
T PCI_GNT3#
Z1202
D6
T PCI_GNT4#
B1
[14,24] PCI_REQ0#
PCI_REQ0#
A2
[14,20] PCI_REQ1# PCI_REQ1#
B3
[14,18] PCI_REQ2#
PCI_REQ2#
C7
[14] PCI_REQ3# PCI_REQ3#
B6
[14] PCI_REQ4# PCI_REQ4#
+3VS
P5
[10] CLK_ICHPCI PCI_CLK
R172 M3
[14,18,20,24] PCI_DEVSEL# PCI_DEVSEL#
F1
[14,18,20,24] PCI_FRAME# PCI_FRAME#
B5
[21,26] AC_IN#
PCI_GPIO0/REQA#
10K PCI_REQB# A6
PCI_GPIO1/REQB_L/REQ5#
E8
[13,19] FLASH#
PCI_GPIO16/GNTA#
Z1203 C5
PCI_GPIO17/GNTB_L/GNT5#
L5
[14,18,20,24] PCI_IRDY#
PCI_IRDY#
PCI_PAR G1
[18,20,24] PCI_PAR PCI_PAR
L4
[14,18,20,24] PCI_PERR#
PCI_PERR#
M2
[14] PCI_LOCK# PCI_LOCK#
W2
[18,20,24] PCI_PME#
PCI_PME#
Z1204 U5
PCI_RST#
K5
[14,18,20,24] PCI_SERR#
PCI_SERR#
F3
[14,18,20,24] PCI_STOP# PCI_STOP#
F2
[14,18,20,24] PCI_TRDY#
PCI_TRDY#
R220 10K
+3V
ICH4-M
PCIRST# R474 0
PCIRST#
+3V INT_APICCLK
INT_APICD0
INT_APICD1
U11
C201 5
0.1UF
1
Z1205
R215 *0 4
2
*74AHC1G08
3
92/02/24
+5VS
C199
*0.1U
U10
Z1223 1 8
OE1# VCC
R461 0 SMB_CLK 2 7 Z1224
SMB_ICHCLK 1A OE2#
3 6
SMB_ICHCLK 1B 2B
4 5 SMB_DATA R205
GND 2A
R462 *74CBT3306
R206
*100
*100
+VCCRTC
R174
100K
W6 Z1206
SM_INTRUDER#
AC3
SMLINK0
AB1
SMLINK1
AC4 SMB_ICHCLK
SMB_ICHCLK [8,10,14]
SMB_CLK
AB4 SMB_ICHDATA
SMB_DATA SMB_ICHDATA [8,10,14]
AA5 SMBALT# R182 10K
SMB_ALERT#/GPIO11
Y22 H_A20GATE
H_A20GATE [21]
CPU_A20GATE
AB23 H_A20M#
CPU_A20M# H_A20M# [3]
U23 H_DPSLP#
H_DPSLP# [3,5]
CPU_DPSLP#
AA21 FERR# R144 56
CPU_FERR# H_FERR# [3]
W21 H_IGNNE#
CPU_IGNNE# H_IGNNE# [3]
V22 H_INIT#
CPU_INIT# H_INIT# [3]
AB22 H_INTR
CPU_INTR H_INTR [3]
V21 H_NMI
H_NMI [3]
CPU_NMI
Y23 H_PWRGD
CPU_PWRGOOD H_PWRGD [3]
U22 H_RCIN#
H_RCIN# [21]
CPU_RCIN#
U21 H_CPUSLP#
CPU_SLP# H_CPUSLP# [3]
W23 H_SMI#
H_SMI# [3]
CPU_SMI#
V23 H_STPCLK#
CPU_STPCLK# H_STPCLK# [3]
HUB_PD[10:0] [6]
L19 HUB_PD0
HUB_PD0
L20 HUB_PD1
HUB_PD1
M19 HUB_PD2
HUB_PD2
M21 HUB_PD3
HUB_PD3
P19 HUB_PD4
HUB_PD4
R19 HUB_PD5
HUB_PD5
T20 HUB_PD6
HUB_PD6
R20 HUB_PD7
HUB_PD7
P23 HUB_PD8 +1.5VS
HUB_PD8
L22 HUB_PD9
HUB_PD9
N22 HUB_PD10
HUB_PD10
K21 HUB_PD11 R427 56 R133
HUB_PD11
T21 48.7_1%
CLK_ICH66 [10]
HUB_CLK
N20
HUB_PSTRB# [6]
HUB_PSTRB#
P21
HUB_PSTRB HUB_PSTRB [6]
R23 HUB_RCOMP_ICH
HUB_RCOMP
M23 HUB_VREF_ICH
HUB_VREF
R22 HUB_VSWING_ICH
HUB_VSWING
J19 INT_APICCLK
INT_APICCLK [10]
INT_APICCLK
H19 INT_APICD0
INT_APICD0
K20 INT_APICD1 92/02/24
INT_APICD1
D5
INT_PIRQA# INT_PIRQA# [14,24]
C2
INT_PIRQB# [14,20]
INT_PIRQB#
B4
INT_PIRQC# INT_PIRQC# [14,18,24]
A3
INT_PIRQD# [14]
INT_PIRQD#
C8 GPIO2
INT_PIRQE#/GPIO2
D7 C468
INT_PIRQF#/GPIO3 IDE_PATADET [14]
0.01uF
C3
INT_PIRQG#/GPIO4 IDE_SATADET [14]
C4 GPIO5
INT_PIRQH#/GPIO5
AC13
INT_IRQ14 INT_IRQ14 [14,17]
AA19
INT_IRQ15 INT_IRQ15 [14,17]
J22
INT_SERIRQ [19,21,24]
INT_SERIRQ
92/02/24
Z1207
D10
EEP_CS T
D11 Z1208
EEP_DIN T
EEPROM A8 EEP_DOUT GPIO2
EEP_DOUT
C12 Z1209 EEP_DOUT [13]
EEP_SHCLK T
A10 Z1210 GPIO5
LAN_RXD0 T
Z1211
A9
LAN_RXD1 T
A11 Z1212
LAN_RXD2 T
Z1213
B10
LAN_TXD0 T
C10 Z1214
LAN_TXD1 T
A12 Z1215
LAN_TXD2 T
C11 Z1216
LAN_JCLK T
B11 Z1217
LAN_RSTSYNC T
Y5 Z1218
LAN_RST#
R184
10K +3VS
R464
10K
PCI_REQB#
PCI_PAR
R424 R414 R420 R190
10K 10K
0 100
+2.5V
+3V
R221
1K
+1.8VS
2SC4672 Z1220 2
C
R478 1K Z1219 B
E
Q35
R216 20K
+1.5VS
R209
SMB_ICHDATA [8,10,14]
0 180K
SMB_ICHDATA [8,10,14]
R223 10K +3V
D S PCIRST#
[18,20,24] PRST#
Q34 G
BSS138
+3V
取代原先 U40 之線路
+1.5VS
R415
487_1%
C461 C467 R421
0.1uF 0.1uF 150_1%
+1.5VS
HUB_VREF and HUB_VSWING
circuits for internal
R416
130_1% testing need 10 mil traces
w/ 20 mil spacing
R422
C462 150_1%
0.1uF
+3VS
R171 8.2K
R195 8.2K
HUB INTERFACE VSWING VOLTAGE
HUB INTERFACE LAYOUT: Route singnals
with 4/8 trace/space routing .Singals
must match +/-0.1" of HUB_STB/STB#
SIGNALS
This bus Swith prevents
leakage of the SMBus into
devices powered on the
switched rall.
-SOE => Auto Reboot Select
0 - Enable
1 - Disable (Default)
SPEAK => CPU FREQ STRAPPING
U14
0 - Enable
+3VS 1 - Disable
7404
4 -ROMCS => LPC ROM Select
R233
R212
10K
1K
U13
Z1221 3 1 ICHPWROK
ICHPWROK [4,11,13,14,21,22]
MR# RESET#
Z1222 4
RST-IN
5 2
+5VS VCC GND
MAX6306
C200
0.1UF
PRSTEN [13]