Core Low-Power State Descriptions; Core C0 State; Core C1/Autohalt Powerdown State; Package Low-Power States - Intel P8700 - Core 2 Duo Processor Datasheet

Low Power Features
Figure 2.

Package Low-Power States

Normal
† — Deeper Sleep includes the Deeper Sleep state, Deep C4 sub-state, and C6
Table 1.

Coordination of Core Low-Power States at the Package Level

Package State
Core0 State
C0
C1
C2
C3
C4/Deep Power
Down Technology
NOTE:
1. AutoHALT or MWAIT/C1.
2.1.1

Core Low-Power State Descriptions

2.1.1.1

Core C0 State

This is the normal operating state for cores in the processor.
2.1.1.2

Core C1/AutoHALT Powerdown State

C1/AutoHALT is a low-power state entered when a core executes the HALT instruction.
The processor core will transition to the C0 state upon occurrence of SMI#, INIT#,
LINT[1:0] (NMI, INTR), or FSB interrupt messages. RESET# will cause the processor to
immediately initialize itself.
A System Management Interrupt (SMI) handler will return execution to either Normal
state or the AutoHALT Powerdown state. See the Intel® 64 and IA-32 Architectures
Software Developer's Manuals, Volume 3A/3B: System Programmer's Guide for more
information.
Datasheet
SLP# asserted
STPCLK# asserted
Stop
Grant
STPCLK# deasserted SLP# deasserted
Snoop Snoop
serviced occurs
Stop Grant
Snoop
C0 C1
Normal Normal
1
Normal Normal
Normal Normal
Normal Normal
Normal Normal
DPSLP# asserted
Sleep
DPSLP# deasserted
Core1 State
1
C2 C3
Normal Normal
Normal Normal
Stop-Grant Stop-Grant
Stop-Grant Deep Sleep
Stop-Grant Deep Sleep
DPRSTP# asserted
Deep Deeper
†
Sleep Sleep
DPRSTP# deasserted
C4/Deep Power Down
Technology State
(Code Named C6 State)
Normal
Normal
Stop-Grant
Deep Sleep
Deeper Sleep /Intel®
Enhanced Deeper Sleep/
Intel® Deep Power Down
13