Instruction Format - Renesas M32R-FPU Software Manual

2

2.2 Instruction format

There are two major instruction formats: two 16-bit instructions packed together within a
word boundary, and a single 32-bit instruction (see Figure 2.2.1). Figure 2.2.2 shows
the instruction format of M32R CPU.
Fig. 2.2.1 16-bit instruction and 32-bit instruction
< 16-bit instruction >
op1
op1
op1
< 32-bit instruction >
op1
op1
op1
op1
op1
op1
Fig. 2.2.2 Instruction format of M32R CPU
address + 0
16-bit instruction A
address + 0
R = R
R op2 R
1
1 2
R = R
R c
1
1
Branch (Short Displacement)
cond c
R op2 R
1 2
R op2 R
1 2
R c
1
cond c
R op2 op3
0000
s
R op2 R op3
s1 s2
INSTRUCTION SET
1 word
+ 1 + 2 + 3
16-bit instruction B
1 word
+ 1 + 2 + 3
32-bit instruction
op R
1 2
op c
1
c
R = R
1 2
c
Compare and Branch
R = R
1 1
Branch
Floating-point 2-operand
R op4
0000
d
(R =op(R
d
Floating-point 3-operand
R op4
0000
d
(R =R 1 op R
d s
2-12
M32R-FPU Software Manual (Rev.1.01)
2.2 Instruction format
op c
op c
))
s
2)
s