Pcie/Pci/Pnp Configuration; Launch Storage Oprom Policy; Pci Latency Timer; Perr# Generation - Supermicro Supero X9SRH-7F User Manual

Chapter 4: AMI BIOS
PCIe/PCI/PnP Configuration

This feature allows the user to set the PCI/PnP configurations for the following items:

Launch Storage OpROM Policy

In case of multiple Option ROMs (Legacy and UEFI-compatible), this feature speci-
fies what ROM to launch. The options are Legacy Only and UEFI Only.

PCI Latency Timer

This feature sets the latency Timer of each PCI device installed on a PCI bus. Se-
lect 64 to set the PCI latency to 64 PCI clock cycles. The options are 32 PCI Bus
Clocks, 64 PCI Bus Clocks, 96 PCI Bus Clocks, 128 PCI Bus Clocks, 160 PCI
Bus Clocks, 192 PCI Bus Clocks, 224 PCI Bus Clocks and 248 PCI Bus Clocks.

PERR# Generation

Set this item to Enabled to allow PCI devices to generate PERR# error codes. The
options are Enabled and Disabled.

SERR# Generation

Set this item to Enabled to allow PCI devices to generate SERR# error codes. The
options are Enabled and Disabled.

Maximum Payload

This feature selects the setting for the PCIE maximum payload size. The options
are Auto, 128 Bytes, and 256 Bytes.

Maximum Read Request

This feature selects the setting for the PCIE maximum Read Request size. The
options are Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and
4096 Bytes.

ASPM Support

Set this item to the desired ASPM (Active State Power Management) level. The
options are Disabled, Auto and Force L0s.

Above 4G Decoding

Set this item to Enabled to activate 64-bit capable devices to be decoded above
the 4G address space. This works only if the system supports 64-bit PCI decoding.
The options are Enabled and Disabled.
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