System Management Bus (Jipmb1 ); Wake-On-Ring - Supermicro Supero X9SRH-7F User Manual

X9SRH Motherboard Series User's Manual
System Management Bus (JIPMB1
A System Management Bus header for the
IPMI slot is located at IPMB. Connect the
appropriate cable here to use the IPMB I2C
connection on your system.

Wake-On-Ring

The Wake-On-Ring header is designated
JWOR1. This function allows your comput-
er to wake up when receiving an incoming
call to the modem when in the suspend
state. See the table on the right for pin
definitions. You must have a Wake-On-
Ring card and cable to use this feature.
MH1
A
DP3
C
1 6
9
5
A
JPB1
1-2 Enable
1
2-3 Disable
3
JI2C2
20
1
2
1
2
7
1
2
7
10
C361
2
1
7
JBT1 COMS CLEAR
JSTBY1
MH11
JS7
1
3
FANA MH10
)
A
C
UID_LED
UID
1
UID_SW
JPL1/2: LAN
1-2 Enable
2-3 Disable
JPL2
1 3
1 3
DIMM_A1
JPL1
MH5
+
X_BT1
US1
2
1
MH7
6-SGPIO1
6-SGPIO2
8 7 8 7
T-SGPIO2 T-SGPIO1
2
1 1
JTAG1
4 RAID_KEY(Intel)
2-30
System Management
Pin# Definition
1
2
3
4
Pin# Definition
1
2
A. System Management Bus
B. Wake On Ring
22
FAN4
1 1 6
4
7
13
1 3 1
LAN2 JLAN2 LAN1 JLAN1
JVR1
DIMM_A2 DIMM_B1 DIMM_B2
CLOSE 1st
Socket R
LGA 2011
CPU
OPEN 1st
JWD1:Watch Dog
1-2:RST
2-3:NMI
C A JVI2C1
JWD1 JVI2C2
20
JVR2
3
JF1 1
Bus
Clock
Ground
Data
No Connection
Wake-On-Ring
Pin Definitions
(JWOR1)
Ground
Wake-up
FAN3
B
1
USB0/1
JPUSB1
IPMI_LAN
JWOR1
MH9
CPU1
DIMM_D2 DIMM_D1 DIMM_C2 DIMM_C1
JD1:
1-3: PWR LED
4-7: SPEAKER
JPW2
JD1
JPW1
7
MH8