Clk Gen, Hdmi-In - EUROCOM X8100 Service Manual

CLK GEN, HDMI-In

CLOCK GENERATOR
C L K _ 3 . 3V _ 1 . 5 V
RSVD. for ICS9LVS3158
R 1 04 * 0_ 0 4
1 . 5 V S
R 9 2 0 _ 04
C L K _ V C C 1
C LK _ V C C 1
17
24
29
XO U T
C 1 3 5 3 3p _ 5 0V _ N P O_ 0 4
X1
X 8 A 01 4 3 1A F K 1H _1 4 . 3 18 1 8 MH z
6 -2 2-1 4R 31- 1B H
27
C 13 4 3 3p _ 5 0V _ N P O_ 0 4 XI N 28
R 7 9 3 3 _ 04 R E F _ 0 / C P U _S E L 30
1 3 C L K _B U F _ R E F 1 4
C LK _ S D A TA 31
C LK _ S C LK 32
33
12
21
26
SMBus
Q1 7
MT N 7 0 02 Z H S 3
D S C L K _ S C L K
8 , 9 , 1 3, 3 5 S MB _C LK _ D D R 3
R 77 2 . 2 K _0 4
5V S
R 78 2 . 2 K _0 4
D S C L K _ S D A T A
8 , 9 , 1 3, 3 5 S MB _ D A TA _ D D R 3
Q1 6
MT N 7 0 02 Z H S 3
MINI-PCIE CARD for HDMI IN
J _ H D M I _ I N
C 12 8 17 -1 1 9A 5 -L
H D M I _I N _ V C C
19 R 5 54 1K _0 4 H D MI _ I N _ H P D
H O T P L U G D E TE C T
1 8
+5 V
17
D D C / C E C G N D
H D M I _ I N _ S D A 1 6
S D A
H D MI _ I N _S C L
15
S C L
1 4
R E S E R V E D
H D MI _ I N _C E C
13
C E C
H D M I _ I N _ C L K # 1 2
TM D S C LO C K -
11
C L K S H I E L D
H D M I _ I N _ C L K 1 0
TM D S C LO C K +
9 H D MI _ I N _D 0#
TM D S D A T A 0-
8
S H I E L D 0
7 H D MI _ I N _D 0
T MD S D A T A 0 +
H D M I _ I N _ D 1 #
6
TM D S D A TA 1-
5
S H I E LD 1
H D M I _ I N _ D 1
4
TM D S D A TA 1+
3 H D MI _ I N _D 2#
TM D S D A T A 2-
2
S H I E L D 2
1 H D MI _ I N _D 2
T MD S D A T A 2 +
1 . 5 V S
3. 3 V S _ H D MI _ I N
C 39 6 C 4 03 C 4 0 0 C 58 7
1 u _ 6. 3 V _ X 5R _0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1u _ 1 6V _ Y 5V _ 0 4 * 10 u _ 6. 3 V _ X 5R _0 6
U 6
C L K _ V C C 2
1 1 5
V D D _ D O T V D D _ S R C _ I / O
5 1 8
V D D _ 2 7 V D D _ C P U _ I / O
V D D _ S R C
V D D _ C P U
3 2 3 R N 2
V D D _ R E F D OT _ 9 6 C L K _B U F _ D O T9 6 _P
4 1 4 0 _4 P 2 R _ 0 4
C L K _B U F _ D O T9 6 _N
D O T_ 9 6 #
2
V S S _ D OT
6
2 7 M
7
27 M_ S S
X T A L_ O U T
X T A L_ I N
1 0 2 3 R N 4
S R C _ 1/ S A T A C L K _P C I E _ I C H
1 1 1 4 0 _4 P 2 R _ 0 4
S R C _ 1 # / S A TA # C L K _P C I E _ I C H # 1 3
1 3
S R C _ 2
1 4 2 3 R N 5
R E F _0 / C P U _ S E L S R C _ 2 # C L K _S A TA 1 3
1 4 0 _4 P 2 R _ 0 4
C L K _S A TA # 1 3
R 1 0 7 2 . 2K _ 0 4
S D A C LK _ 3 . 3 V _1 . 5 V
1 6
S C L C P U _S T OP #
1 4 R N 3 C LK _ D OC 1
2 0 2 3 *0 _ 4P 2 R _0 4 C LK _ D OC 0
V S S C P U _ 1
8 1 9
V S S _ 2 7 C P U _ 1 #
9 2 3 1 4 R N 1
V S S _ S A T A C P U _ 0 C L K _B U F _ B C L K _ P 1 3
2 2 2 3 0 _4 P 2 R _ 0 4
C L K _B U F _ B C L K _ N 1 3
V S S _ S R C C P U _ 0 #
V S S _ C P U
C L K _ P W R GD
2 5
V S S _ R E F C K P W R G D / P D #
S L G8 S P 5 8 5
R 8 3 1 0 K _0 4
Q1 8
MT N 7 0 02 Z H S 3 C 1 3 6
R 8 2
G *0 . 1 u _1 0 V _ X7 R _ 0 4
3 5 C L K E N #
1 M _0 4
3 . 3V S
C L K _ D O C 0 1 3
C L K _ D O C 1 1 3
C L K _D OC 0
R 9 7 * 1 0_ 0 4 R 98 *1 0 _ 04
1 . 5 V S
C L K _D OC 1
R 9 5 * 1 0_ 0 4 R 94 *1 0 _ 04
RSVD. for ICS9LVS3158
2 3 T X _ H D M I _ C L K #
2 3 T X _ H D M I _ C L K
R 3 1 7
3 . 3 V S
R ev _3 .0
1 3 H D MI _ I N _ C L K R E Q#
1 3 C L K _ P C I E _ H D MI _ I N #
D 4 2
13 C LK _ P C I E _H D M I _I N
5 6 H D MI _ I N _ C L K #
H D MI _ I N _C LK # 2 3
H D MI _ I N _ C L K
4 7
H D MI _ I N _C LK 23
3 8
2 9 H D MI _ I N _ D 0 #
H D MI _ I N _D 0# 2 3
1 1 0 H D MI _ I N _ D 0
H D MI _ I N _D 0 23
* MS E A 4 2 5 10 V 1 2 B 0
13 P C I E _R X N 8 _H D M I _I N
1 3 P C I E _ R XP 8 _ H D MI _ I N
D 4 3 1 3 P C I E _ T X N 8 _H D M I _I N
1 3 P C I E _ T XP 8 _ H D MI _ I N
5 6 H D MI _ I N _D 1#
H D MI _ I N _D 1# 2 3
4 7 H D MI _ I N _D 1
H D MI _ I N _D 1 23
3 8
2 3 T X_ H D MI _ D 2 #
2 9 H D MI _ I N _D 2#
H D MI _ I N _D 2# 2 3 2 3 T X_ H D MI _ D 2
H D MI _ I N _D 2
1 1 0
H D MI _ I N _D 2 23
* MS E A 4 2 5 10 V 1 2 B 0
D 4 4
1 H D M I _I N _ S C L
H D MI _ I N _ S C L 2 3
3
2 H D M I _I N _ S D A
H D MI _ I N _ S D A 23
*T V N _ S T 23 _ 0 2_ A B 0
C 39 3 C 3 9 9 C 3 95 C 4 04 C 3 9 7
1 0 u _6 . 3 V _ X5 R _ 0 6 1 0u _ 6. 3V _ X 5R _ 06 1 u _ 6. 3 V _ X 5R _0 4 1 u _ 6. 3 V _ X 5R _0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4
CLKGEN POWER
C LK _ V C C 1
C 1 3 3 C 1 5 4 C 1 6 0 C 1 4 9 C 13 2
0 . 1u _ 1 0V _ X 7 R _ 04 0 . 1u _ 1 0V _ X 7 R _ 04 0 . 1 u_ 1 0V _ X 7 R _ 0 4 0 . 1 u_ 1 0V _X 7 R _ 0 4 0 . 1 u_ 1 0 V _X 7 R _ 0 4
0 .1uF nea r th e eve ry p ower pin
13
1 3
C L K _ V C C 2
R 9 9 *0 _ 04
L 1 7 H C B 16 0 8 K F -1 21 T 25
C 1 64 C 1 5 8 C 1 6 5
13
0. 1 u _ 10 V _ X 7R _0 4 0. 1 u _ 10 V _ X 7R _0 4 10 u _ 6. 3 V _ X 5R _ 06 V DD_I/ O ca n be
r angin g fr om
1 .05V to 3 .3V
0 .1uF nea r th e ev ery p ower pin
R E F _ 0 / C P U _S E L
C 1 3 1 * 10 p _5 0 V _ N P O _0 4
EMI
EMI Capa ctio r
CPU_SEL_During CK_PEWGD Latch Pinl
3. 3 V S
1 . 1V S _V T T
PIN _30
R 8 0 * 4 . 7K _ 0 4 R E F _ 0/ C P U _ S E L
0 (def ault )
R 8 1 1 0 K _ 04
1 (0.7 V-1. 5V)
3 . 3V S
R 5 1 4
R 5 1 3 0 _ 04 U 45
5V S _ H D MI _ I N 5V S
4
V I N V O U T
D 4 0 C A 5
V I N
* R B 7 5 1 V -40
3
1 4, 28 , 3 1, 3 4 , 3 6 S U S B # E N
*G5 2 4 3A
J _M I N I _ H D MI _ I N
1 2
W A K E # 3 . 3 V _ 0 3 . 3V S _H D M I _I N
3 4
B T_ D A TA GN D 5
1 0 K _ 04 5 6
B T_ C H C L K 1 . 5 V _ 0 1 . 5V S
7 8
C L K R E Q # U I M_ P W R
9 10
GN D 0 U I M_ D A TA T X_ H D MI _ S D A 2 3
1 1 12 C 39 2
R E F C LK - U I M _C LK T X_ H D MI _ S C L 2 3
1 3 14
R E F C LK + U I M_ R E S E T
1 5 16 H D MI _ I N _H P D 1 u _6 . 3 V _ X5 R _ 0 4
GN D 1 U I M _V P P
KEY
1 7 18
N C 3 GN D 6
1 9 20
N C 4 W _D I S A B L E # B U F _P L T _R S T # 3, 1 6 , 28 . . 3 1
2 1 22
GN D 2 P E R S E T #
2 3 24
P E Tn 0 3. 3 V A U X 3 . 3V S _H D M I _I N
2 5 26
P E Tp 0 GN D 7
2 7 28
GN D 3 1 . 5 V _ 1
2 9 30
TX _ H D MI _ D 0 # 2 3
GN D 4 N C (S MB _C LK )
3 1 32
P E R n 0 N C (S MB _ D A TA ) TX _ H D MI _ D 0 2 3
3 3 34
P E R p 0 GN D 8
3 5 36
GN D 1 1 N C (U S B _ D -)
3 7 38
N C 6 N C (U S B _D +)
3 9 40
N C 7 GN D 9
4 1 42
N C 8 N C (L E D _ W W A N #) TX _ H D MI _ D 1 # 2 3
4 3 44
TX _ H D MI _ D 1 2 3
N C 9 L E D _W LA N #
4 5 46
N C 1 0 N C (L E D _ W P A N #)
4 7 48
1 . 5V S
N C 1 1 1 . 5 V _ 2
4 9 50 C 39 8
N C 1 2 GN D 1 0
5 1 52
3 . 3V S _H D M I _I N
N C 1 3 3 . 3 V _ 1
1 u _ 6. 3 V _ X 5R _0 4
B E L LW E TH E R 8 0 00 3 -1 02 1
H = 4.0 mm
2 3 H D MI _ I N _ V C C
5V S _H D M I _I N
C 4 01
2, 3 , 1 2 . . 14 , 1 6 , 17 , 1 9, 22 , 2 5, 2 8 , 2 9, 3 5 . . 3 9 3. 3 V
1 8, 2 8 , 3 8 1 . 5 V S
0 . 1 u _1 6 V _ Y 5 V _ 04
3 , 8. . 1 2 , 1 4, 1 6 . . 1 9, 2 1 . . 2 4, 2 6 . . 3 5 3 . 3 V S
1 0 , 11 , 1 9 , 21 , 2 3 . . 27 , 3 2 . . 35 5 V S
3 , 5 , 6, 12 . . 1 4, 17 . . 1 9, 35 , 3 6 1. 1 V S _ V T T
Schematic Diagrams
3 . 3V S
L1 6
H C B 1 6 08 K F -1 2 1T 2 5
C 16 3
1 0 u_ 6 . 3 V _X 5 R _ 0 6
C L K _V C C 1
1 . 1 V S _ V T T
Sheet 20 of 55
CLK GEN, HDMI-In
C PU_0 C PU_1
1 33MH z 1 33MH z
1 00MH z 1 00MH z
0_ 0 6
1
3 . 3 V S _ H D MI _ I N
2
G N D
H D M I _I N _V C C
C 5 7 9
0. 1u _ 16 V _ Y 5 V _ 0 4
5 V S _ H D MI _ I N
C 4 0 2 C 3 9 4
0 . 1u _ 1 6V _ Y 5V _ 0 4 *1 0 u _6 . 3 V _ X5 R _ 0 6
CLK GEN, HDMI-In B - 21