EUROCOM X8100 Service Manual page 111

Power Block Diagram
3 .3 V
DD _O N# DD _O N
SYST EM VR
5 V
AC BA TT ER Y
AD A PT ER PA C K
2
DD _ ON
1
Sta rtup PW R_SW #
C ircuit
B utton
11
V COR E_ O N
1 .8 VS
1 .8V S _ PW RG D
1.8 VS VR
1 .5 VS
1 .5V S _ PW RG D
1.5 VS VR
5
1 .5 V
DD R1 . 5 V _ PW RG D
D D R V R
V TT _M E M
V D D 5
V D D 3
1 .8 VS
VD D 3
V IN
S YS TE M V R D D_ ON
VD D 5 V IN
V IN
V D D 3 1 .5 V
PW R _BTN #
ITE 85 12
3
R SMR ST#
A L L_ S Y S_ PW R G D
SL P_ S 3 # (S US B# )
10
99ms DELAY 4 SL P_ S 4 # (S US C# )
14
13
7
S LG8 SP5 85
8
9
1. 1 V S_V TT_ PW R GD
6
1 .1 VS
1 .1V S_ VTT VR
5V S
SL P_ S3 3. 3V S
SW IT C HE S
1. 5V S
VI N
1. 8V S
S LP _S 4
S WITC H ES
1. 1V S _V TT
VT T_ ME M
1. 5V S _C P U
SU SB S US B#
IB EX PE AK
17
B UF_ PLT_R ST#
PLT_ RS T#
H _ CPU PW RGD
PRO C PW RGD
SB _ PW RO K 16 N C
SY S _PW ROK
V D DPW R GO OD
PM_ PW RO K DR A MPW RO K
15
V C O R E
DEL A Y _ PW R GD
C PU COR E V R
CLK _PW RGD CLKEN# V C ORE_O N
12
Schematic Diagrams
1 .5 V
S US C#
Sheet 54 of 55
Power Block
C P U
Diagram
R STIN #
V C CPW R GOO D_0
V C CPW R GOO D_1
S M_DR A MPW ROK
Power Block Diagram B - 55