B - 14 Pch 2/8 Pcie, Smbus, Clk - EUROCOM X8100 Service Manual

Schematic Diagrams
PCH 2/8 PCIE, SMBUS, CLK
Sheet 13 of 55
PCH 2/8
PCIE, SMBUS, CLK
2 0 C L K _ P C I E _ H D M I _ I N #
2 0 C L K _ P C I E _ H D M I _ I N
20 H D MI _ I N _ C L K R E Q #
2 8
2 8
2 8
2 8 C L K _ P C I E _ N E W _ C A R D #
28 C L K _ P C I E _ N E W _ C A R D
2 8 N E W C A R D _ C L K R E Q #
Onl y PC IECLK RQ [2 :1 ]# on PCH a re core w e l l
pow e re d. A ll ot he r PC IECLK RQ x # a re suspe nd
w e ll pow e re d.
29
2 9
3 0
11
1 1
1 1

B - 14 PCH 2/8 PCIE, SMBUS, CLK

IBEXPEAK - M (PCI-E,SMBUS,CLK)
B G3 0
2 8 P C I E _ R X N 1 _ W L A N
B J 3 0
2 8 P C I E _ R X P 1_ W LA N
C 2 4 0 0 . 1 u _ 10 V _X 7 R _ 04 P C I E _ TX N 1 _ C B F 2 9
2 8 P C I E _ TX N 1 _ W L A N
C 2 3 8 0 . 1 u _ 10 V _X 7 R _ 04 P C I E _ TX P 1_ C B H 2 9
2 8 P C I E _ TX P 1_ W LA N
A W 3 0
2 8 P C I E _ R X N 2 _ N E W _ C A R D
B A 3 0
2 8 P C I E _ R X P 2 _ N E W _ C A R D
P C I E _ TX N 2 _ C
C 2 4 6 0 . 1 u _ 10 V _X 7 R _ 04 B C 3 0
2 8 P C I E _ T X N 2 _ N E W _ C A R D
P C I E _ TX P 2_ C
C 2 4 3 0 . 1 u _ 10 V _X 7 R _ 04 B D 3 0
2 8 P C I E _ T X P 2 _ N E W _ C A R D
R 1 9 3 *0 _ 0 4 A U 3 0
A T 3 0
R 1 9 6 *0 _ 0 4 A U 3 2
A V 3 2
B A 3 2
2 9 P C I E _R X N 4 _ G L A N
B B 3 2
2 9 P C I E _R X P 4 _ GL A N
C 2 4 4 0 . 1 u _ 10 V _X 7 R _ 04 P C I E _ TX N 4 _ C B D 3 2
2 9 P C I E _ T X N 4 _ G L A N
P C I E _ TX P 4_ C
C 2 4 1 0 . 1 u _ 10 V _X 7 R _ 04 B E 3 2
2 9 P C I E _ T X P 4 _ GL A N
B F 3 3
3 0 P C I E _ R X N 5 _ C R
B H 3 3
3 0 P C I E _ R X P 5 _C R
C 2 4 2 0 . 1 u _ 10 V _X 7 R _ 04 P C I E _ TX N 5 _ C B G3 2
3 0 P C I E _ T X N 5 _ C R
C 2 4 5 0 . 1 u _ 10 V _X 7 R _ 04 P C I E _ TX P 5_ C B J 3 2
3 0 P C I E _ T X P 5 _C R
B A 3 4
A W 3 4
B C 3 4
B D 3 4
A T 3 4
2 8 P C I E _ R X N 7 _ T V
A U 3 4
2 8 P C I E _ R X P 7 _T V
P C I E _ TX N 7 _ C
C 2 5 8 0 . 1 u _ 10 V _X 7 R _ 04 A U 3 6
2 8 P C I E _ T X N 7 _ T V
C 2 5 9 0 . 1 u _ 10 V _X 7 R _ 04 P C I E _ TX P 7_ C A V 3 6
2 8 P C I E _ T X P 7 _T V
B G3 4
20 P C I E _R X N 8 _ H D M I _ I N
B J 3 4
2 0 P C I E _ R X P 8 _ H D MI _ I N
C 2 5 3 0 . 1 u _ 10 V _X 7 R _ 04 P C I E _ TX N 8 _ C B G3 6
2 0 P C I E _ T X N 8 _ H D M I _ I N
P C I E _ TX P 8_ C
C 2 4 7 0 . 1 u _ 10 V _X 7 R _ 04 B J 3 6
2 0 P C I E _ T X P 8 _ H D MI _ I N
100MHz
2 3 R N 1 9 C L K _ P C H _ S R C 0 _ N A K 4 8
C L K _ P C H _ S R C 0 _ P
1 4 0 _ 4 P 2 R _ 0 4 A K 4 7
P 9
100MHz
1 4 R N 1 8 C L K _ P C H _ S R C 1 _ N A M4 3
C L K _ P C I E _ W LA N #
2 3 0 _ 4 P 2 R _ 0 4 C L K _ P C H _ S R C 1 _ P A M4 5
C L K _ P C I E _ W L A N
U 4
W L A N _ C L K R E Q #
100MHz 1 4 R N 1 7 C L K _ P C H _ S R C 2 _ N A M4 7
2 3 0 _ 4 P 2 R _ 0 4 C L K _ P C H _ S R C 2 _ P A M4 8
N 4
R 1 9 2 * 0 _0 4 A H 4 2
A H 4 1
R 1 6 1 * 0 _0 4 A 8
100MHz
2 3 R N 1 4 C L K _ P C H _ S R C 4 _ N A M5 1
C L K _ P C I E _ G LA N #
C L K _ P C H _ S R C 4 _ P
1 4 0 _ 4 P 2 R _ 0 4 A M5 3
C LK _P C I E _G L A N
L A N _C L K R E Q# M9
2 9 LA N _ C L K R E Q#
100MHz
2 3 R N 1 2 C L K _ P C H _ S R C 5 _ N A J 5 0
C L K _ P C I E _ C R #
1 4 0 _ 4 P 2 R _ 0 4 C L K _ P C H _ S R C 5 _ P A J 5 2
3 0 C L K _ P C I E _ C R
P C I E C L K R Q5 # H 6
100MHz
2 3 R N 1 5 A K 5 3
C L K _ P C I E _ M XM 2 #
1 4 * 4P 2 R X 3 3 _ 04 _ S H OR T A K 5 1
C L K _ P C I E _ M X M2
MX M 2_ C L K R E Q#
P 1 3
M X M2 _ C L K R E Q#
PCI-E x1 Usage
Port 0 WLAN
Port 1 NEW ARD
Port 2 X
Port 3 GLAN
Port 4 CARD READER
Port 5 X
Port 6 TV
Port 7 HDMI IN
SMB us
U 1 4 B Zo= 50 O
P C H _ B T _ E N #
B 9
P E R N 1 S M B A L E R T# / GP I O1 1
P E R P 1
H 1 4 S MB _ C L K _ D D R 3
P E T N 1 S M B C L K
P E T P 1
S MB _ D A T A _ D D R 3
C 8
S M B D A T A
P E R N 2
P E R P 2
P C H _ U P E K _ I N I T#
J 1 4
P E T N 2 S M L 0 A L E R T# / GP I O6 0
P E T P 2
C 6 S ML 0 _ C L K
S M L0 C L K
P E R N 3
S ML 0 _ D A TA
G 8
P E R P 3 S ML 0 D A T A
P E T N 3
P E T P 3
L P D _ S P I _ I N T R #
M 1 4
S M L 1 A L E R T# / GP I O7 4
P E R N 4
E 10 S ML 1 _ C L K R 4 1 7
P E R P 4 S M L 1 C L K / GP I O5 8
P E T N 4
S ML 1 _ D A TA
G 1 2 R 4 2 5
P E T P 4 S M L 1D A T A / GP I O7 5
P E R N 5
T 1 3
P E R P 5 C L _C L K 1
P E T N 5
T 1 1
P E T P 5 C L _ D A T A 1
T 9
P E R N 6 C L _ R S T 1 #
P E R P 6
P E T N 6
P E T P 6
H 1 M X M1 _ C L K R E Q#
P E G _ A _ C L K R Q# / GP I O4 7
P E R N 7
P E R P 7
C L K _ P C H _ P E GA _ N
A D 4 3
P E T N 7 C L K O U T_ P E G_ A _ N
A D 4 5 C L K _ P C H _ P E GA _ P
P E T P 7 C L K OU T _ P E G _ A _ P
A N 4
P E R N 8 C L K O U T _ D MI _ N
A N 2
P E R P 8 C LK OU T _ D M I _ P
P E T N 8
P E T P 8
P C H _ C L K _ D P _ N _ R
A T1
C LK OU T _ D P _ N / C L K OU T _ B C LK 1_ N
A T3 P C H _ C L K _ D P _ P _ R
C L K O U T_ D P _ P / C L K O U T _ B C L K 1 _ P
C L K O U T _ P C I E 0 N
C L K O U T _ P C I E 0 P
A W 2 4 100MHz
C LK I N _ D MI _ N
B A 2 4
P C I E C L K R Q0 # / GP I O 7 3 C L K I N _ D M I _ P
133MHz
A P 3
C L K O U T _ P C I E 1 N C L K I N _ B C L K _ N
A P 1
C L K O U T _ P C I E 1 P C L K I N _ B C L K _ P
96MHz
P C I E C L K R Q1 # / GP I O 1 8
F 18
C L K I N _ D O T _ 96 N
E 18
C L K I N _ D OT _ 9 6 P
C L K O U T _ P C I E 2 N
C L K O U T _ P C I E 2 P
100MHz
A H 1 3
C L K I N _ S A T A _ N / C K S S C D _ N
A H 1 2
P C I E C L K R Q2 # / GP I O 2 0 C L K I N _S A T A _ P / C K S S C D _ P
14.318MHz
P 41
C L K O U T _ P C I E 3 N R E F C L K 14 I N
C L K O U T _ P C I E 3 P
33MHz
J 4 2
P C I E C L K R Q3 # / GP I O 2 5 C L K I N _P C I L O OP B A C K
A H 5 1 X T A L 2 5 _ I N
C L K O U T _ P C I E 4 N X T A L 2 5_ I N
X T A L 2 5 _ OU T
A H 5 3
C L K O U T _ P C I E 4 P XT A L 2 5 _ OU T
A F 3 8 X C L K _ R C OM P
P C I E C L K R Q4 # / GP I O 2 6 X C L K _ R C OM P
90 .9 -O ? % pul lu p t o +Vc cI O
T 4 5
C L K O U T _ P C I E 5 N C L K O U T F LE X0 / GP I O6 4 (1 .0 5V , S 0 rai l)
C L K O U T _ P C I E 5 P
P 43
P C I E C L K R Q5 # / GP I O 4 4 C L K O U T F LE X1 / GP I O6 5
T 4 2
C L K O U T _ P E G _ B _ N C L K O U T F LE X2 / GP I O6 6
C L K O U T _ P E G _ B _ P
N 5 0
P E G _B _C L K R Q# / G P I O 5 6 C L K O U T F LE X3 / GP I O6 7
I B E X P E A K -M
RSVD. for ICS9LVS3158
P C H _ B T _ E N # R 1 6 2 1 0 K _ 0 4
S M B _ C L K _ D D R 3
R 4 3 4 2 . 2 K _ 0 4
P C H _ B T _ E N # 2 5
S M B _ D A T A _ D D R 3 R 1 5 9 2 . 2 K _ 0 4
S M B _ C L K _ D D R 3 8 , 9 , 2 0 , 3 5
P C H _ U P E K _ I N I T #
R 4 4 5 1 0 K _ 0 4
S M B _ D A T A _D D R 3 8 , 9 , 2 0 , 3 5
S M L0 _ C L K R 4 2 6 2 . 2 K _ 0 4
S M L0 _ D A T A
R 4 2 2 2 . 2 K _ 0 4
S M L 0_ C L K 2 8
L P D _ S P I _ I N T R # R 4 4 0 1 0 K _ 0 4
S M L 0_ D A T A 2 8
S M L1 _ C L K R 4 2 0 2 . 2 K _ 0 4
S M L1 _ D A T A
R 4 2 9 2 . 2 K _ 0 4
0 _0 4
S M C _T H E R M_ 1 2 , 1 1 , 3 1
0 _0 4
S M D _T H E R M_ 1 2 , 1 1 , 3 1
P C I E C L K R Q 5 # R 3 9 7 1 0 K _ 0 4
C L _ C L K 1 2 8
MX M 1 _C L K R E Q # R 1 5 2 1 0 K _ 0 4
C L _ D A T A 1 2 8
MX M 2 _C L K R E Q # R 4 3 2 1 0 K _ 0 4
C L _ R S T # 1 2 8
MX M 1 _ C L K R E Q # 1 0
100MHz
2 3 R N 2 0
C L K _ P C I E _ MX M 1 # 1 0
1 4 *4 P 2 R X3 3 _ 0 4 _ S H O R T
C L K _ P C I E _ MX M 1 1 0
100MHz
C L K _ E X P _ N 3
C L K _ E X P _ P 3
C L K _ P C I E _ I C H # 2 0
C L K _ P C I E _ I C H 2 0
C L K _ B U F _ B C L K _ N 2 0
C L K _ B U F _ B C L K _ P 2 0
C L K _ B U F _ D OT 9 6 _ N 20
C L K _ B U F _ D OT 9 6 _ P 2 0
Checklist 1.6 ? ? ? ?
C L K _ S A T A # 2 0
C L K _ S A T A 2 0
C 2 7 6 0 _0 4
C L K _ B U F _ R E F 1 4 2 0
R 2 2 1 X 4
*X 8 A 0 2 5 0 00 F G1 H _2 5 M H z
C L K _ P C I _ F B 1 6
*1 M _ 04
C 2 7 5 *1 5 p _ 50 V _N P O _ 0 4
R 4 5 6 90 . 9 _ 1 % _ 0 4
1 . 1 V S _ V T T
C L K _ D O C 0 2 0
C L K _ D O C 1 2 0
5 V 1 1 , 1 9, 25 , 3 6 . . 3 9
3 . 3V S 3 , 8 . . 1 2 , 1 4 , 1 6 . . 2 4, 26 . . 3 5
1 . 1V S _ V T T 3 , 5 , 6 , 1 2 , 14 , 1 7 . . 2 0 , 3 5 , 3 6
3 . 3V 2 , 3 , 1 2 , 1 4, 1 6 , 1 7 , 1 9 , 2 2 , 2 5, 28 , 2 9 , 3 5 . . 3 9
3 . 3 V