National Semiconductor CP3BT26 User Manual page 268

Bus State
T
CLK
A[21:0]
A22 ('13 only)
SELx
(y ≠ x)
SELy
(y ≠ x)
D[15:0]
RD
WR[1:0]
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Fast Read
T1-2
idle
t
4
t , t
5 12
t
1
t
2
In
t , t
5 12
Figure 135. Early Write Between Fast Read Cycles
Early Write
T1 T2
t , t
4 12
t , t
5 12
Out
t , t
5 12
268
Fast Read
T3 T1-2
In
T1
DS128