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TSEG1
The Time Segment 1 field configures the
length of the Time Segment 1 (TSEG1). It is
not recommended to configure the time seg-
ment 1 to be smaller than 2 time quanta. (see
Table 59).
Table 59 Time Segment 1 Settings
TSEG1[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
TSEG2
The Time Segment 2 field specifies the num-
ber of time quanta (tq) for phase segment 2
(see Table 60).
Table 60 Time Segment 2 Settings
TSEG2
000
001
010
011
100
101
110
111
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19.10.8 Global Mask Register (GMSKB/GMSKX)
The GMSKB and GMSKX registers allow software to global-
ly mask, or "don't care" the incoming extended/standard
identifier bits, RTR/XRTR and IDE. Throughout this docu-
ment, the GMSKB and GMSKX 16-bit registers are refer-
enced as a 32-bit register GMSK.
The following are the bits for the GMSKB register.
Length of Time
(TSEG1)
15
Not recommended
2 time quanta
3 time quanta
4 time quanta
The following are the bits for the GMSKX register.
5 time quanta
15
6 time quanta
7 time quanta
8 time quanta
9 time quanta
10 time quanta
For all GMSKB and GMSKX register bits, the following ap-
plies:
11 time quanta
0 – The incoming identifier bit must match the correspond-
12 time quanta
1 – Accept 1 or 0 ("don't care") in the incoming ID bit inde-
13 time quanta
14 time quanta
15 time quanta
16 time quanta
When an extended frame is received from the CAN bus, all
GMSK bits GM[28:0], IDE, RTR, and XRTR are used to
mask the incoming message. In this case, the RTR bit in the
GMSK register corresponds to the SRR bit in the message.
The XRTR bit in the GMSK register corresponds to the RTR
bit in the message.
During the reception of standard frames only the GMSK bits
GM[28:18], RTR, and IDE are used. In this case, the
Length of TSEG2
GM[28:18] bits in the GMSK register correspond to the
ID[10:0] bits in the message.
1 time quantum
2 time quanta
Global Mask GM[28:18] RTR IDE GM[17:0] XRTR
3 time quanta
Standard
4 time quanta
Extended
5 time quanta
6 time quanta
7 time quanta
8 time quanta
136
5
4
GM[28:18]
RTR
0
R/W
GM[14:0]
0
R/W
ing bit in the message buffer identifier register.
pendent from the corresponding bit in the message
buffer ID registers. The corresponding ID bit in the mes-
sage buffer will be overwritten by the incoming identifier
bits.
ID[10:0]
RTR IDE
Frame
ID[28:18]
SRR IDE
Frame
3
2
0
IDE
GM[17:15]
1
0
XRTR
Unused
ID[17:0]
RTR
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