National Semiconductor CP3BT26 Manuals

Manuals and User Guides for National Semiconductor CP3BT26. We have 1 National Semiconductor CP3BT26 manual available for free PDF download: User Manual

National Semiconductor CP3BT26 User Manual

National Semiconductor CP3BT26 User Manual (278 pages)

Reprogrammable Connectivity Processor with Bluetooth, USB, and CAN Interfaces

Brand: National Semiconductor | Category: Computer Hardware | Size: 4.3 MB

Table of Contents

1 General Description

1
- Block Diagram
  1
- Table of Contents
  2
2 Features

3
3 Device Overview

4
- CR16C CPU Core
  4
- Memory
  4
- Input/Output Ports
  4
- Bus Interface Unit
  4
- Interrupt Control Unit (ICU)
  4
- Multi-Input Wake-Up
  4
- Bluetooth LLC
  5
- Usb
  5
- CAN Interface
  5
- Quad UART
  5
- Advanced Audio Interface
  5
- CVSD/PCM Conversion Module
  5
- 12-Bit Analog to Digital Converter
  5
- Random Number Generator
  6
- Microwire/Spi
  6
- Access.bus Interface
  6
- Multi-Function Timer
  6
- Timing and Watchdog Module
  6
- Versatile Timer Unit
  6
- Triple Clock and Reset
  6
- Power Management
  7
- DMA Controller
  7
- Serial Debug Interface
  7
- Development Support
  7
4 Signal Descriptions

8
5 CPU Architecture

15
- General-Purpose Registers
  15
- Dedicated Address Registers
  15
- Processor Status Register (PSR)
  16
- Configuration Register (CFG)
  17
- Addressing Modes
  18
- Stacks
  19
- Instruction Set
  19
6 Memory

24
- Operating Environment
  24
- Bus Interface Unit (BIU)
  25
- Bus Cycles
  25
- BIU Control Registers
  25
- Wait and Hold States
  28
7 System Configuration Registers

29
8 Flash Memory

31
- Flash Memory Protection
  31
- Flash Memory Organization
  31
- Flash Memory Operations
  32
- Information Block Words
  34
- Flash Memory Interface Registers
  35
9 DMA Controller

41
- Channel Assignment
  41
- Transfer Types
  41
- Operation Modes
  42
- Software DMA Request
  43
- Debug Mode
  43
- DMA Controller Register Set
  43
10 Interrupts

47
- Non-Maskable Interrupts
  47
- Maskable Interrupts
  47
- Interrupt Controller Registers
  47
- Maskable Interrupt Sources
  50
- Nested Interrupts
  50
11 Triple Clock and Reset

51
- External Crystal Network
  52
- Main Clock
  53
- Slow Clock
  53
- PLL Clock
  53
- System Clock
  54
- Auxiliary Clocks
  54
- Power-On Reset
  54
- External Reset
  54
- Clock and Reset Registers
  54
12 Power Management

56
- Active Mode
  56
- Power Save Mode
  56
- Idle Mode
  57
- Halt Mode
  57
- Hardware Clock Control
  57
- Power Management Registers
  57
- Switching between Power Modes
  59
13 Multi-Input Wake-Up

61
- Multi-Input Wake-Up Registers
  62
- Programming Procedures
  66
14 Input/Output Ports

67
- Port Registers
  67
- Open-Drain Operation
  71
15 Bluetooth Controller

72
- RF Interface
  72
- Serial Interface
  73
- LMX5251 Power-Up Sequence
  76
- LMX5252 Power-Up Sequence
  76
- Bluetooth Sleep Mode
  77
- Bluetooth Global Registers
  77
- Bluetooth Sequencer RAM
  77
- Bluetooth Shared Data RAM
  78
12 Bit Analog to Digital Converter

79
- Functional Description
  79
- Touchscreen Interface
  81
- ADC Operation in Power-Saving Modes
  83
- Freeze
  83
- ADC Register Set
  83
17 Random Number Generator (RNG)

88
- Freeze
  88
- Random Number Generator Register Set
  89
18 USB Controller

90
- Functional States
  90
- Endpoint Operation
  91
- USB Controller Registers
  93
- Transceiver Interface
  108
19 CAN Module

109
- Functional Description
  109
- Basic CAN Concepts
  110
- Message Transfer
  118
- Acceptance Filtering
  119
- Receive Structure
  120
- Transmit Structure
  123
- Interrupts
  125
- Time Stamp Counter
  126
- Memory Organization
  127
- CAN Controller Registers
  128
- System Start-Up and Multi-Input Wake-Up
  140
- Usage Hint
  142
20 Advanced Audio Interface

143
- Audio Interface Signals
  143
- Audio Interface Modes
  143
- Bit Clock Generation
  146
- Frame Clock Generation
  146
- Audio Interface Operation
  146
- Communication Options
  148
- Audio Interface Registers
  151
21 CVSD/PCM Conversion Module

158
- Operation
  158
- PCM Conversions
  158
- CVSD Conversion
  159
- PCM to CVSD Conversion
  159
- CVSD to PCM Conversion
  159
- Interrupt Generation
  159
- DMA Support
  159
- Freeze
  160
- CVSD/PCM Converter Registers
  160
22 UART Modules

163
- Functional Overview
  163
- UART Operation
  163
- UART Registers
  168
- Baud Rate Calculations
  172
23 Microwire/Spi Interface

175
- Microwire Operation
  175
- Master Mode
  177
- Slave Mode
  178
- Interrupt Generation
  178
- Microwire Interface Registers
  179
24 Access.bus Interface

181
- ACB Protocol Overview
  181
- ACB Functional Description
  183
- Access.bus Interface Registers
  185
- Usage Hints
  189
25 Timing and Watchdog Module

192
- TWM Structure
  192
- Timer T0 Operation
  192
- Watchdog Operation
  193
- TWM Registers
  193
- Watchdog Programming Procedure
  195
26 Multi-Function Timer

196
- Timer Structure
  196
- Timer Operating Modes
  197
- Timer Interrupts
  202
- Timer I/O Functions
  202
- Timer Registers
  203
27 Versatile Timer Unit (VTU)

206
- VTU Functional Description
  206
- VTU Registers
  210
28 Register Map

214
29 Register Bit Fields

230
30 Electrical Characteristics

243
- Absolute Maximum Ratings
  243
- DC Electrical Characteristic
  243
- USB Transceiver Electrical Characteristics
  245
- ADC Electrical Characteristics
  245
- Flash Memory On-Chip Programming
  246
- Output Signal Levels
  247
- Clock and Reset Timing
  247
- UART Timing
  249
- I/O Port Timing
  250
- Advanced Audio Interface (AAI) Timing
  251
- Microwire/Spi Timing
  253
- Access.bus Timing
  258
- USB Port AC Characteristics
  261
- Multi-Function Timer (MFT) Timing
  261
- Versatile Timing Unit (VTU) Timing
  262
- External Bus Timing
  263
31 Pin Assignments

269
- LQFP-128 Package
  269
- LQFP-144 Package
  272
32 Revision History

276
33 Physical Dimensions

277

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