24309E—March 2002
4
Power Management
4.1
Power Management States
C1
Halt
Probe
1
State
Note:
The AMD Athlon
1) The Probe state
2) During transitions between the Halt state and the C2 Stop Grant state
3) During transitions between the C2 Stop Grant state and the Halt state
4) C0 Working state
Figure 3. AMD Athlon™ XP Processor Model 6 Power Management States
Chapter 4
Preliminary Information
This chapter describes the power management control system
of the AMD Athlon™ XP processor model 6. The power
management features of the processor are compliant with the
ACPI 1.0b and ACPI 2.0 specifications.
The AMD Athlon XP processor model 6 supports low-power
Halt and Stop Grant states. These states are used by Advanced
Configuration and Power Interface (ACPI) enabled operating
systems for processor power management.
Figure 3 shows the power management states of the processor.
The figure includes the ACPI "Cx" naming convention for these
states.
Execute HLT
SMI#, INTR, NMI, INIT#, RESET#
Incoming Probe
Probe Serviced
TM
System Bus is connected during the following states:
Power Management
AMD Athlon™ XP Processor Model 6 Data Sheet
C0
4
Working
C2
Stop Grant
Cache Snoopable
S1
Stop Grant
Cache Not Snoopable
Sleep
Legend
Hardware transitions
Software transitions
9
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