Clock Control - AMD AX1800DMT3C - Athlon XP 1.53 GHz Processor Datasheet

24309E—March 2002
4.3

Clock Control

Chapter 4
Preliminary Information
The processor implements a Clock Control (CLK_Ctl) MSR
(address C001_001Bh) that determines the internal clock
divisor when the AMD Athlon system bus is disconnected.
Refer to the AMD Athlon™ and AMD Duron™ Processors BIOS,
Software, and Debug Developers Guide, order# 21656, for more
details on the CLK_Ctl register.
Power Management
AMD Athlon™ XP Processor Model 6 Data Sheet
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