Interface State Combinations; Processor Core Power Management; Table 4-11 G, S And C State Combinations; Table 4-12 D, S, And C State Combination - Intel P4000 - DATASHEET REV 001 Datasheet

4.1.7

Interface State Combinations

Table 4-11.G, S and C State Combinations
Global
(G) State
G0
G0
G0
G0
G1
G1
G2
G3
Table 4-12.D, S, and C State Combination
Graphics Adapter
(D) State
D0
D0
D0
D0
D3
D3
D3
4.2

Processor Core Power Management

While executing code, Enhanced Intel SpeedStep Technology optimizes the processor's
frequency and core voltage based on workload. Each frequency and voltage operating
point is defined by ACPI as a P-state. When the processor is not executing code, it is
idle. A low-power idle state is defined by ACPI as a C-state. In general, lower power
C-states have longer entry and exit latencies.
40
Processor
Sleep
Core
(S) State
(C) State
S0 C0
S0 C1/C1E
S0 C3
S0 C6
S3 Power off
S4 Power off
S5 Power off
NA Power off
Sleep (S) State
S0
S0
S0
S0
S0
S3
S4
Processor
System Clocks
State
Full On On
Auto-Halt On
Deep Sleep On
Deep Power On
Down
Off, except RTC
Off, except RTC
Off, except RTC
Power off
Package (C) State
C0
C1/C1E
C3
C6
Any
N/A
N/A
Power Management
Description
Full On
Auto-Halt
Deep Sleep
Deep Power Down
Suspend to RAM
Suspend to Disk
Soft Off
Hard off
Description
Full On, Displaying
Auto-Halt, Displaying
Deep sleep, Displaying
Deep Power Down,
Displaying
Not displaying
Not displaying, Graphics
Core is powered off
Not displaying, suspend to
disk
Datasheet