Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - SPECIFICATION UPDATE 01-2011 Specification page 10

Errata (Sheet 3 of 4)
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10
Status
Malformed PCIe Transactions May be Treated as Unsupported Requests Instead of
No Fix
as Critical Errors
No Fix PCIe Root Port May Not Initiate Link Speed Change
Incorrect Address Computed For Last Byte of FXSAVE/FXRSTOR or XSAVE/
No Fix
XRSTOR Image Leads to Partial Memory Update
No Fix Performance Monitor SSE Retired Instructions May Return Incorrect Values
FP Data Operand Pointer May Be Incorrectly Calculated After an FP Access Which
No Fix
Wraps a 4-Gbyte Boundary in Code That Uses 32-Bit Address Size in 64-bit Mode
FP Data Operand Pointer May Be Incorrectly Calculated After an FP Access Which
No Fix
Wraps a 64-Kbyte Boundary in 16-Bit Code
No Fix Spurious Interrupts May be Generated From the Intel® VT-d Remap Engine
Fault Not Reported When Setting Reserved Bits of Intel® VT-d Queued Invalidation
No Fix
Descriptors
VPHMINPOSUW Instruction in Vex Format Does Not Signal #UD When vex.vvvv
No Fix
!=1111b
LBR, BTM or BTS Records May have Incorrect Branch From Information After an
No Fix
EIST/T-state/S-state/C1E Transition or Adaptive Thermal Throttling
VMREAD/VMWRITE Instruction May Not Fail When Accessing an Unsupported
No Fix
Field in VMCS
No Fix Clock Modulation Duty Cycle Cannot be Programmed to 6.25%
Execution of VAESIMC or VAESKEYGENASSIST With An Illegal Value for
No Fix
VEX.vvvv May Produce a #NM Exception
No Fix Memory Aliasing of Code Pages May Cause Unpredictable System Behavior
PCI Express Graphics Receiver Error Reported When Receiver With L0s Enabled
No Fix
and Link Retrain Performed
No Fix Unexpected #UD on VZEROALL/VZEROUPPER
No Fix Perfmon Event LD_BLOCKS.STORE_FORWARD May Overcount
Conflict Between Processor Graphics Internal Message Cycles And Graphics
No Fix
Reads From Certain Physical Memory Ranges May Cause a System Hang
Execution of Opcode 9BH with the VEX Opcode Extension May Produce a #NM
No Fix
Exception
Executing The GETSEC Instruction While Throttling May Result in a Processor
No Fix
Hang
A Write to the IA32_FIXED_CTR1 MSR May Result in Incorrect Value in Certain
No Fix
Conditions
Instruction Fetch May Cause Machine Check if Page Size and Memory Type Was
No Fix
Changed Without Invalidation
Reception of Certain Malformed Transactions May Cause PCIe Port to Hang
No Fix
Rather Than Reporting an Error
No Fix PCIe LTR Incorrectly Reported as Being Supported
PerfMon Overflow Status Can Not be Cleared After Certain Conditions Have
No Fix
Occurred
XSAVE Executed During Paging-Structure Modification May Cause Unexpected
No Fix
Processor Behavior
ERRATA
Specification Update