Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - SPECIFICATION UPDATE 01-2011 Specification page 9

Errata (Sheet 2 of 4)
Steppings
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D-2 Q-0
BJ6
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Specification Update
Status
Code Segment Limit/Canonical Faults on RSM May be Serviced before Higher
No Fix
Priority Interrupts/Exceptions and May Push the Wrong Address Onto the Stack
Corruption of CS Segment Register During RSM While Transitioning From Real
No Fix
Mode to Protected Mode
Debug Exception Flags DR6.B0-B3 Flags May be Incorrect for Disabled
No Fix
Breakpoints
DR6.B0-B3 May Not Report All Breakpoints Matched When a MOV/POP SS is
No Fix
Followed by a Store or an MMX Instruction
EFLAGS Discrepancy on Page Faults and on EPT-Induced VM Exits after a
No Fix
Translation Change
No Fix Fault on ENTER Instruction May Result in Unexpected Values on Stack Frame
No Fix Faulting MMX Instruction May Incorrectly Update x87 FPU Tag Word
No Fix FREEZE_WHILE_SMM Does Not Prevent Event From Pending PEBS During SMM
General Protection Fault (#GP) for Instructions Greater than 15 Bytes May be
No Fix
Preempted
#GP on Segment Selector Descriptor that Straddles Canonical Boundary May Not
No Fix
Provide Correct Exception Error Code
No Fix IO_SMI Indication in SMRAM State Save Area May be Set Incorrectly
IRET under Certain Conditions May Cause an Unexpected Alignment Check
No Fix
Exception
No Fix LER MSRs May Be Unreliable
LBR, BTS, BTM May Report a Wrong Address when an Exception/Interrupt Occurs
No Fix
in 64-bit Mode
MCi_Status Overflow Bit May Be Incorrectly Set on a Single Instance of a DTLB
No Fix
Error
No Fix MONITOR or CLFLUSH on the Local XAPIC's Address Space Results in Hang
No Fix MOV To/From Debug Registers Causes Debug Exception
No Fix PEBS Record not Updated when in Probe Mode
Performance Monitoring Event FP_MMX_TRANS_TO_MMX May Not Count Some
No Fix
Transitions
REP MOVS/STOS Executing with Fast Strings Enabled and Crossing Page
No Fix Boundaries with Inconsistent Memory Types may use an Incorrect Data Size or
Lead to Memory-Ordering Violations
Reported Memory Type May Not Be Used to Access the VMCS and Referenced
No Fix
Data Structures
No Fix Single Step Interrupts with Floating Point Exception Pending May Be Mishandled
No Fix Storage of PEBS Record Delayed Following Execution of MOV SS or STI
No Fix The Processor May Report a #TS Instead of a #GP Fault
No Fix VM Exits Due to "NMI-Window Exiting" May Be Delayed by One Instruction
No Fix Pending x87 FPU Exceptions (#MF) May be Signaled Earlier Than Expected
No Fix Values for LBR/BTS/BTM Will be Incorrect after an Exit from SMM
No Fix Unsupported PCIe Upstream Access May Complete with an Incorrect Byte Count
ERRATA
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