Evaluation Board Hardware; Power Supplies; Input Signals; Output Signals - Analog Devices EVAL-ADF4150HVEB1Z User Manual

UG-406

EVALUATION BOARD HARDWARE

The EVAL-ADF4150HVEB1Z
Figure 26, Figure 27, and Figure 28. The silkscreen of the
evaluation board is shown in Figure 2.

POWER SUPPLIES

There are two separate supply voltages required for the
evaluation board.
•
Banana connectors should be supplied with 30 V. This
powers the LM317LDG regulator, which provides a
regulated 29 V to V (the charge pump supply of the
P
ADF4150HV) and 12 V for the DCYS100200-12 VCO
supply (V ).
VCO
•
The test point labeled +5V must be supplied with 5 V, as
shown in Figure 24. This powers high precision, low noise
ADP150AUJZ-3.3 linear regulators to provide 3.3 V to V
on the board (which supplies the
and SDV pins), to V
DD OUT
outputs pull-up), and to the
improves PFD spur levels at the VCO output.
The D3 LED indicates when the

INPUT SIGNALS

The reference signal is necessary for proper operation of the
synthesizer. It can be sourced from a provided TCXO or from
an external generator, which can be connected to the REFIN
edge mount connector. To use an external reference generator, it
is necessary to remove R101 and R100 to disconnect the TCXO
from the reference input and from the supply. R102 can be popu-
lated with a 50 Ω resistor to adjust the impedance matching of
the evaluation board to the external reference source.
Digital SPI signals are supplied from the Cypress microcontrol-
ler, U6, which is used for communication with the USB port
of the PC.

OUTPUT SIGNALS

All components necessary for LO generation are inserted on the
board. The PLL is made up of the
fourth-order passive loop filter, and the octave range VCO. The
loop filter is inserted between the charge pump output and the
VCO input, as shown in Figure 28. If replacing the VCO, a VCO
in a T-package (or similar) must be used. The VCO output is
available at the edge mount SMA connector, VCO_I/O, and the
differential RF output of the part is connected to the RFOUT+
and RFOUT− edge mount SMA connectors.
A buffer, the ADL5541, is placed between the VCO output and
the ADF4150HV RF + pin, which significantly lowers the PFD
IN
spur levels seen at the VCO output below −110 dBc. If the PFD
spur level measured on the VCO output without a buffer is
sufficient (approximately −80 dBc) or if the output signal is
taken only from the RF output pins of the ADF4150HV and not
schematics are shown in Figure 25,
ADF4150HV AV , DV
DD
(supply for the ADF4150HV
ADL5541 buffer, which
ADF4150HV is powered.
ADF4150HV synthesizer, a
from the VCO ouput, the
bypassed.
The device is quite sensitive to impedance unbalance. If only
one port of the differential pair is used, the other should be
terminated with a 50 Ω load. The external VCO output should
also be terminated in a 50 Ω load.

DEFAULT OPERATION SETTINGS

This board is shipped with a TCXO that provides a reference
frequency of 25 MHz, a fourth-order low-pass filter with 20 kHz
bandwidth at I
1 GHz to 2 GHz frequency range. To test the performance of
the part for a different frequency range and different loop filter,
the relevant components on the board must be changed.
Note that the Synergy VCO tuning sensitivity decreases as the
DD
,
tuning voltage increases (see Figure 3). To maintain a constant
DD
RF
loop filter bandwidth, increase the charge pump value to the
maximum of 400 µA for frequencies greater than approximately
1.8 GHz.
Rev. 0 | Page 4 of 24
Evaluation Board User Guide
ADL5541 is not needed and can be
= 300 μA, and an octave range VCO with a
CP
Figure 2. Evaluation Board Silkscreen