Enclustra Andromeda XZU90 User Manual page 25

NOTICE
Damage to the MGT lines
No AC coupling capacitors are placed on the Andromeda XZU90 module on the
MGT lines.
GTY Transceivers
There are 28 GTY MGTs available on the Andromeda XZU90 module organized in 7 FPGA banks - Table
12 describes the connections.
The naming convention for the GTY MGT I/Os is:
MGT_B<BANK>_<FUNCTION>_<POLARITY>.
For example, MGT_B128_TX2_N is a transmit pin with negative polarity located on MGT I/O bank 128.
Signal Name
MGT_B128_RX<...>
MGT_B128_TX<...>
MGT_B128_REFCLK<...>
MGT_B129_RX<...>
MGT_B129_TX<...>
MGT_B129_REFCLK<...>
MGT_B130_RX<...>
MGT_B130_TX<...>
MGT_B130_REFCLK<...>
MGT_B131_RX<...>
MGT_B131_TX<...>
MGT_B131_REFCLK<...>
MGT_B132_RX<...>
MGT_B132_TX<...>
MGT_B132_REFCLK<...>
MGT_B133_RX<...>
MGT_B133_TX<...>
MGT_B133_REFCLK<...>
MGT_B134_RX<...>
Continued on next page...
D-0000-458-001
If required by your application, ensure that capacitors are mounted on the
base board, close to the module pins.
Signal Description
MGT receivers
MGT transmitters
MGT reference input clocks
MGT receivers
MGT transmitters
MGT reference input clocks
MGT receivers
MGT transmitters
MGT reference input clocks
MGT receivers
MGT transmitters
MGT reference input clocks
MGT receivers
MGT transmitters
MGT reference input clocks
MGT receivers
MGT transmitters
MGT reference input clocks
MGT receivers
Pairs
4
4
2
4
4
2
4
4
2
4
4
2
4
4
2
4
4
2
4
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I/O Bank
128
129
130
131
132
133
134
Version 02, 26.06.2023