Cypress CY14B101L Specification Sheet page 11

1 mbit (128k x 8) nvsram
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AutoStore or Power Up RECALL
Parameter
Alt
[13]
t
t
HRECALL
RESTORE
[14, 15]
t
t
STORE
HLHZ
V
SWITCH
t
VCCRISE
Switching Waveforms
V
CC
V
SWITCH
t
VCCRISE
AutoStore
POWER-UP RECALL
Read & Write Inhibited
Note Read and Write cycles are ignored during STORE, RECALL, and while Vcc is below V
Notes
13. t
starts from the time V
HRECALL
CC
14. If an SRAM WRITE has not taken place since the last nonvolatile cycle, no STORE will take place.
15. Industrial Grade devices requires 15 ms max.
Document Number: 001-06400 Rev. *I
Description
Power up RECALL Duration
STORE Cycle Duration
Low Voltage Trigger Level
V
Rise Time
CC
Figure 9. AutoStore/Power Up RECALL
t
HRECALL
rises above V
.
SWITCH
STORE occurs only
if a SRAM write
has happened
t
STORE
t
HRECALL
SWITCH
CY14B101L
CY14B101L
Min
Max
20
12.5
2.65
150
No STORE occurs
without atleast one
SRAM write
t
STORE
Page 11 of 18
Unit
ms
ms
V
μs
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