Cypress CY14B101L Specification Sheet

Features
■
25 ns, 35 ns, and 45 ns access times
■
Pin compatible with STK14CA8
■ Hands off automatic STORE on power down with only a small
capacitor
■
STORE to QuantumTrap™ nonvolatile elements is initiated by
software, hardware, or AutoStore™ on power down
■ RECALL to SRAM initiated by software or power up
■ Unlimited READ, WRITE, and RECALL cycles
■ 200,000 STORE cycles to QuantumTrap
■
20 year data retention at 55°C
■ Single 3V +20%, –10% operation
■ Commercial and industrial temperature
■ 32-pin (300 mil) SOIC and 48-pin (300 mil) SSOP packages
■ RoHS compliance
Logic Block Diagram
A
5
A
6
A
7
A
8
A
9
A
12
A
13
A
14
A
15
A
16
DQ
0
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
Cypress Semiconductor Corporation
Document Number: 001-06400 Rev. *I

Functional Description

The Cypress CY14B101L is a fast static RAM with a nonvolatile
element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world's most reliable nonvolatile memory. The SRAM provides
unlimited read and write cycles, while independent, nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down. On
power up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control.
QuantumTrap
1024 x 1024
STORE
RECALL
STATIC RAM
ARRAY
1024 X 1024
COLUMN IO
COLUMN DEC
A A A A A A A
0 1 2 3 4 10 11
• 198 Champion Court
1 Mbit (128K x 8) nvSRAM
V V
CC CAP
POWER
CONTROL
STORE/
HSB
RECALL
CONTROL
SOFTWARE
DETECT
,
• San Jose CA 95134-1709
CY14B101L
-
A
A
15 0
OE
CE
WE
• 408-943-2600
Revised January 30, 2009
[+] Feedback