Swd Debugging; Pin Configuration - Infineon AIROC CYW20829 User Manual

Evk module evaluation kit
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AIROC™ CYW20829: CYW920829B0M2P4XXI100-EVK Module
Evaluation Kit user guide
Kit operation
2.10

SWD debugging

The ModusToolbox™ supports multiple Arm®-JTAG adapters for debugging Bluetooth® products such as
CYW20829. Debugging is possible on CYW920829B0M2P4XXI100-EVK through SWD signals. The SWD is a 2-wire
interface that uses SWD input output (SWDIO) and serial wire clock (SWDCLK) for debugging the device. In
CYW920829B0M2P4XXI100-EVK, P1.2 act as SWDIO, and P1.3 act as SWDCLK. See
pins to the debug connector (J11).
Note:
The SWD and SPI (MISO and MOSI) interfaces share the same GPIOs and must use one interface at
a time.
Figure 13
SWD debugging
2.11

Pin configuration

The GPIOs on the CYW20829 device can be multiplexed to various peripherals. For more information on the
peripherals that can be routed to the various GPIOs, see the device datasheet.
For this board, the ModusToolbox™ initializes GPIOs to the platform's default configuration.
User guide
26
Table 14
to enable the SWD
002-39356 Rev. **
2024-02-07

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