Frequently Asked Questions - Infineon AIROC CYW20829 User Manual

AIROC™ CYW20829: CYW920829B0M2P4XXI100-EVK Module
Evaluation Kit user guide

Frequently asked questions

6 Frequently asked questions
1. How can I access the SPI (MOSI, MISO) signals that are shared with SWDCLK and SWDIO GPIOs?
P1.2 is used for ARD_D5_SWDIO and ARD_D11_MOSI in the kit
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P1.3 is used for ARD_D5_SWDCLK and ARD_D12_MISO in the kit
•
By default, P1.2 and P1.3 are connected via SW6 POS1 to use as SWD ports in the kit. Therefore, Change it to
POS2 in SW6 to enable P1.2 and P1.3 as SPI lines: ARD_D11_MISO and ARD_D11_MOSI.
2. How can I access the SPI (CS, CLK) signals that are shared with User Button2 and USER LED1?
P1.0 is used for ARD_D3_USER_BUTTON2_S and ARD_D10_SPI_CS in the kit
•
P1.1 is used for ARD_D13_SPI_CLK_S and USER_LED1_S in the kit
•
By default, P1.0 is connected to USER_BTN2 via R87; remove it and install R104 to use SPI_CS. Similarly, P1.1 is
connected to USER_LED1 via R90; remove it and install R105 to use SPI_CLK.
3. A secondary UART using SCB1 is not connected via KitProg3. How can I access this UART?
P1.2 and P1.3 ports operate as a secondary UART; the TX and RX lines of this UART are available in J4.5 and J4.6.
To use SCB1 UART, connect the UART lines from Arduino-compatible shield pins D4 and D5 to MiniProg4 or
through FTDI.
4. SCB2 I2C (P5.0, P5.1) pins are not working as I2C master?
Resistor pull-ups are not given. By default, the same pins are used for CANFD
•
Follow any one of the methods to make SCB2 work as a master
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Use the SCB0 I2C pins (P4.0, P4.1) as master and loop back the SCB2 I2C pins (P5.0, P5.1)
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Hardware Abstraction Layer (HAL): Connect the external pull-up resistors
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Peripheral Driver Library (PDL): Enables the SCB from the device configurator and change the pin drive
−
mode from "open drain, drives low, input buffer on" to "resistive pull-up, input buffer on"
5. Why can't we use P1_0, P1_1, P1_2, and P1_3 during DS RAM mode of operation?
When the device is in DS-RAM mode, the following pins are used for SWD operation:
P1_0_CPUSS_SWJ_SWO_TDO
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P1_1_CPUSS_SWJ_SWDOE_TDI
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P1_2_CPUSS_SWJ_SWDIO_TMS
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P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK
•
To utilize these pins, disable the Debug mode before the device enters DS-RAM mode by using
Cy_Syslib_SetWarmBootEntryPoint()
in the API is set to 'False'. If the Debug mode is disabled, the evaluation kit cannot be programmed.
To re-program the device, use the
User guide
API. To disable the Debug mode in DS-RAM, the second parameter
command on modus shell.
make erase
49 002-39356 Rev. **
2024-02-07