Toshiba TLCS-900/L1 Series Manual page 134

BROCR
Bit symbol
(0203H)
Read/Write
After reset
Function Received
data bit8
+(16 − K)/16 division enable
0 Disable
1 Enable
BR0ADD
Bit symbol
(0204H)
Read/Write
After reset
Function
Sets baud rate generator frequency divisor
BR0CR
<BR0S3:0>
DR0ADD
<BR0K3:0>
0000
0001 (K = 1)
to
1111 (K = 15)
Note1:Availability of +(16-K)/16 division function
N
2 to 15
1 , 16
The baud rate generator can be set "1" in UART mode and disable +(16-K)/16 division function.Don't use in
I/O interface mode.
Note2:Set BR0CR <BR0ADDE> to 1 after setting K (K = 1 to 15) to BR0ADD<BR0K3:0> when +(16-K)/16 division
function is used. Writes to unused bits in the BR0ADD register do not affext operation, and undefined data is
read from these unused bits.
Figure 3.10.11 Baud Rate Generator Control (Channel 0, BR0CR, BR0ADD)
7 6 5
−
BR0ADDE BR0CK1
0 0 0
+(16 − K)/16 00: φT0
01: φT2
division
10: φT8
0: Disable
11: φT32
1: Enable
Setting the input clock of baud rate generator
7 6 5
BR0CR<BR0ADDE> = 1
0000 (N = 16)
or
0001 (N = 1)
Disable
Disable
UART mode
○
×
91C829-132
4 3
BR0CK0 BR0S3
R/W
0 0
Internal clock φT0
00
Internal clock φT2
01
Internal clock φT8
10
Internal clock φT32
11
4 3
BR0K3
0
BR0CR<BR0ADDE> = 0
0001 (N = 1) (Only UART)
0000 (N = 2)
or
1111 (N = 15)
1111 (N = 15)
0000 (N = 16)
Disable
Divided by
Divided by N
16 −
K
N +
16
I/O mode
×
×
TMP91C829
2 1
BR0S2 BR0S1
0 0
Setting of the divided frequency
2 1
BR0K2 BR0K1
R/W
0 0
Sets frequency divisor K
(divided by N = (16 − K)/16)
to
2006-03-15
0
BR0S0
0
0
BR0K0
0