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3.8.2
Operation of Each Circuit
(1) Prescalers
A 9-bit prescaler generates the input clock to TMRA01.
The clock φT0 is divided by 4 and input to this prescaler. φT0 can be either f
fc/16 and is selected using the prescaler clock selection register SYSCR0<PRCK1:0>.
The prescaler's operation can be controlled using TA01RUN<TA0PRUN> in the
timer control register. Setting <TA0PRUN> to 1 starts the count; setting <TA0PRUN>
to 0 clears the prescaler to zero and stops operation. Table 3.8.2 shows the various
prescaler output clock resolutions.
Prescaler
Clock Selection
<PRCK1:0>
(f
)
FPH
10
(fc/16 clock)
xxx: Don't care
(2) Up counters (UC0 and UC1)
These are 8-bit binary counters which count up the input clock pulses for the clock
specified by TA01MOD.
The input clock for UC0 is selectable and can be either the external clock input via
the TA0IN pin or one of the three internal clocks φT1, φT4, or φT16. The clock setting is
specified by the value set in TA01MOD<TA01CLK1:0>.
The input clock for UC1 depends on the operation mode. In 16-bit timer mode, the
overflow output from UC0 is used as the input clock. In any mode other than 16-bit
timer mode, the input clock is selectable and can either be one of the internal clocks
φT1, φT16, or φT256, or the comparator output (The match detection signal) from
TMRA0.
For each interval timer the timer operation control register bits
TA01RUN<TA0RUN> and TA01RUN<TA1RUN> can be used to stop and clear the up
counters and to control their count. A reset clears both up counters, stopping the
timers.
Table 3.8.2 Prescaler Output Clock Resolution
Prescaler Output Clock Resolution
Gear Value
<GEAR2:0>
φT1
3
000 (fc)
2
/fc (0.22
4
μ
001 (fc
)
2
/fc (0.4
/2
5
μ
010 (fc
)
2
/fc (0.9
/4
6
μ
011 (fc
)
2
/fc (1.8
/8
7
μ
100 (fc
)
2
/fc (3.6
/16
7
μ
XXX
2
/fc (3.6
91C829-82
φT4
φT16
5
7
μ
μ
s) 2
/fc (0.9
s)
2
/fc (3.6
6
8
μ
s)
2
/fc (1.8
s)
2
/fc (7.1
7
9
μ
s)
2
/fc (3.6
s)
2
/fc (14
8
10
μ
s)
2
/fc (7.1
s)
2
/fc (28
9
11
μ
s)
2
/fc (14
s)
2
/fc (57
9
11
μ
s)
2
/fc (14
s)
2
/fc (57
TMP91C829
FPH
at fc = 36 MHz
φT256
11
μ
μ
s)
2
/fc (57
s)
12
μ
μ
s)
2
/fc (114
s)
13
μ
μ
s)
2
/fc (228
s)
14
μ
μ
s)
2
/fc (455
s)
15
μ
μ
s)
2
/fc (910
s)
15
μ
μ
s)
2
/fc (910
s)
2006-03-15
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