Toshiba TLCS-900/L1 Series Manual page 41

Setting functions on external interrupt pins
Interrupt Pin
NMI
INT0
INT1
INT2
INT3
INT4
INT5
(3) Interrupt request flag clear register
The interrupt request flag is cleared by writing the appropriate micro DMA start
vector, as given in Table 3.5.1, to the register INTCLR.
For example, to clear the interrupt flag INT0, perform the following register
operation after execution of the DI instruction.
INTCLR ← 0AH
Symbol Name Address
Interrupt 88H
INTCLR clear (Prohibit
control RMW)
Mode
Both falling and rising edges
Clears interrupt request flag INT0.
7 6 5
CLRV5
0
91C829-39
Setting Method
<NMIREE> = 0
Falling edge
<NMIREE> = 1
<I0LE> = 0, <I0EDGE> = 0
Rising edge
<I0LE> = 0, <I0EDGE> = 1
Falling edge
<I0LE> = 1, <I0EDGE> = 0
High level
<I0LE> = 1, <I0EDGE> = 1
Low level
<I1LE> = 0, <I1EDGE> = 0
Rising edge
<I1LE> = 0, <I1EDGE> = 1
Falling edge
<I1LE> = 1, <I1EDGE> = 0
High level
<I1LE> = 1, <I1EDGE> = 1
Low level
<I2LE> = 0, <I2EDGE> = 0
Rising edge
<I2LE> = 0, <I2EDGE> = 1
Falling edge
<I2LE> = 1, <I2EDGE> = 0
High level
<I2LE> = 1, <I2EDGE> = 1
Low level
<I3LE> = 0, <I3EDGE> = 0
Rising edge
<I3LE> = 0, <I3EDGE> = 1
Falling edge
<I3LE> = 1, <I3EDGE> = 0
High level
<I3LE> = 1, <I3EDGE> = 1
Low level
<I4LE> = 0, <I4EDGE> = 0
Rising edge
<I4LE> = 0, <I4EDGE> = 1
Falling edge
<I4LE> = 1, <I4EDGE> = 0
High level
<I4LE> = 1, <I4EDGE> = 1
Low level
<I5LE> = 0, <I5EDGE> = 0
Rising edge
<I5LE> = 0, <I5EDGE> = 1
Falling edge
<I5LE> = 1, <I5EDGE> = 0
High level
<I5LE> = 1, <I5EDGE> = 1
Low level
4 3 2
CLRV4 CLRV3 CLRV2
W
0 0 0
Interrupt vector
TMP91C829
1 0
CLRV1 CLRV0
0 0
2006-03-15