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(8-2) UART/SIO channel 1
Symbol
Name
Address
Serial
208H
SC1BUF
channel 1
(Prohibit
buffer
RMW)
Serial
SC1CR
channel 1
209H
control
Serial
SC1MOD0
channel 1
20AH
mode 0
Baud rate
BR1CR
20BH
control
Serial
channel 1
BR1ADD
20CH
K setting
register
Serial
SC1MOD1
channel 1
20DH
mode 1
7
6
RB7/TB7
RB6/TB6
RB5/TB5
RB8
EVEN
R
R/W
Undefined
0
Parity
Receiving
1: Parity
0: Odd
data bit8
enable
1: Even
TB8
CTSE
RXE
0
0
1: CTS
1: Receive
Transmission
enable
enable
data bit8
−
BR1ADD
BR1CK1
0
0
00: φT0
1: (16 − K)/16
Always
01: φT2
write "0".
divided
10: φT8
enable
11: φT32
I2S1
FDPX1
R/W
R/W
0
0
IDLE2
I/O interface
0: Stop
1: Full
1: Operate
duplex
0: Half
duplex
91C829-192
5
4
3
RB4/TB4
RB3/TB3
R (Receiving)/W (Transmission)
Undefined
PE
OERR
PERR
R (cleared to 0 by reading.)
0
0
0
1: Error
Overrun
Parity
WU
SM1
R/W
0
0
0
1: Wakeup
00: I/O interface
enable
01: UART 7 bits
10: UART 8 bits
11: UART 9 bits
BR1CK0
BR1S3
R/W
0
0
BR1K3
0
TMP91C829
2
1
RB2/TB2
RB1/TB1
RB0/TB0
FERR
SCLKS
R/W
0
0
0:SCLK1↑
1: Input
1:SCLK1↓
SCLK1 pin
Framing
SM0
SC1
0
0
00: TA0TRG
01: Baud rate generator
10: Internal clock f
11: External clock SCLK1
BR1S2
BR1S1
0
0
Set the frequency divisor N.
0 to F
BR1K2
BR1K1
R/W
0
0
Baud rate 0 K.
1 to F
STSEN1
STS1
1: Output
0: Stop
2006-03-15
0
IOC
0
SC0
0
SYS
BR1S0
0
BR1K0
0
W
1
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