Intel Core 2 Duo User Manual page 11

®
Abou t Th is M a n u a l—I n t e l
Pow e r - Good
Ringba ck
Syst e m Bus
Se t up W in dow
Sim ult a ne ous Sw it ching Out put
St ub
Tr unk
Syst e m M a na ge m e nt Bu s
Un de r sh oot
V ( CPU cor e )
CC
Vict im
Table 1 defines t he acronym s used t hroughout t his docum ent .
Ta ble 1 . Acr on ym s ( She e t 1 of 3 )
Acr on ym
AC
ACPI
AGTL
AMC
ASF
AMI
May 2007
Order Num ber: 317443- 001US
9 4 5 GM E Ex pr e ss Ch ipse t
" Power- Good," " PWRGOOD," or " CPUPWRGOOD" ( an act ive high
signal) indicat es t hat all of t he syst em power supplies and clocks
are st able. PWRGOOD should go act ive a predet erm ined t im e
aft er syst em volt ages are st able and should go inact ive as soon
as any of t hese volt ages fail t heir specificat ions.
The volt age t o which a signal changes aft er reaching it s
m axim um absolut e value. Ringback m ay be caused by
reflect ions, driver oscillat ions, or ot her t ransm ission line
phenom ena.
The Syst em Bus is t he m icroprocessor bus of t he processor.
The t im e bet ween t he beginning of Set up t o Clock ( TSU_MI N)
and t he arrival of a valid clock edge. This window m ay be
different for each t ype of bus agent in t he syst em .
Sim ult aneous Swit ching Out put ( SSO) effect s are differences in
elect rical t im ing param et ers and degradat ion in signal qualit y
caused by m ult iple signal out put s sim ult aneously swit ching
volt age levels in t he opposit e direct ion from a single signal or in
t he sam e direct ion. These are called odd m ode and even m ode
swit ching, respect ively. This sim ult aneous swit ching of m ult iple
out put s creat es higher current swings t hat m ay cause addit ional
propagat ion delay ( " push- out " ) or a decrease in propagat ion
delay ( " pull- in" ) . These SSO effect s m ay im pact t he set up and/
or hold t im es and are not always t aken int o account by
sim ulat ions. Syst em t im ing budget s should include m argin for
SSO effect s.
The branch from t he bus t runk t erm inat ing at t he pad of an
agent .
The m ain connect ion, excluding int erconnect branches, from
one end
A t wo- wire int erface t hrough which various syst em com ponent s
m ay com m unicat e.
The m inim um volt age ext ending below VSS observed for a
signal at t he device pad.
V ( CPU core) is t he core power for t he processor. The syst em
CC
bus is t erm inat ed t o V
A net work t hat receives a coupled crosst alk signal from anot her
net work is called t he vict im net work.
Audio Codec
Advanced Configurat ion and Power I nt erface
Assist ed Gunning Transceiver Logic
Audio/ Modem Codec.
Alert St andard Form at
Am erican Megat rends I nc. ( BI OS developer)
®
I nt el Core
( CPU core) .
CC
D e fin it ion
TM
2 Duo processor wit h t he Mobile I nt el
®
945GME Express Chipset
Manual
11