Completing The Test; Power Swing Logic Pslpsch - ABB Relion 670 Series Commissioning Manual

Section 11
Testing functionality by secondary injection
logic ZMRPSB"
current in all three phases. With this condition, the output signal START will be activated.
2. After expiration of the set time delay by a timer
3. If required to block inhibit of start output by the presence of slow power swings, BLKI01
must be configured to TRUE. Thereby, the output signal START will be maintained as long
as the power swing condition exists.
Inhibit START output by the single pole reclosing
Preconditions
The input signal I0CHECK, residual current (3I0) detection used to inhibit the start output,
must be configured to the output signal STPE on the FDPSPDIS, FRPSPDIS, ZMFPDIS or
ZMFCPDIS function.
The input signal BLKI02, block inhibit of the start output for subsequent residual current
detection and BLKI01, block inhibit of the start output for slow power swings must be
connected to TRUE.
1. Create a phase-to-earth fault such that the input signal I0CHECK will be activated and a
trip signal from any impedance protection function will be generated.
2. With this condition, the input signal TRSP connected to a tripping function is activated.
3. Clear the fault by injecting zero current magnitude in the fault phase and maintain
healthy conditions in other phases. With this, I0CHECK and TRSP will be deactivated.
4. Make a test sequence to create power swing condition in healthy phases in accordance
with steps 5, 6, and 7 described in section
ZMRPSB". With this condition, the output signal START will be activated.
5. Repeat step
again.
6. Steps
may exist a two phase power swing during single pole autoreclosing time and then
switched-on-to the persistent phase-to-earth fault after single pole autoreclosing time.
7. By doing this, the output signal START will be inhibited.
8. If I0CHECK appears the expiration of a timer
swing and thereby, the output signal START will be maintained as long as the power
swing exists in the power system.
11.4.9.2

Completing the test

continue to test another function or end the test by changing the
Restore connections and settings to their original values, if they were changed for testing
purposes.
11.4.10

Power swing logic PSLPSCH

Prepare the IED for verification of settings as outlined in section
"Preparing for test"
Most readily available test equipment does not permit simulation of power-swing conditions
and the simultaneous occurrence of different faults with controlled fault impedance. For this
reason it is necessary to enable the logic by connecting the STPSD input signal to some other
functional signal, which is used for testing purposes.
Make sure that the existing configuration permits monitoring of the CS, TRIP signals on the
binary outputs of the IED. If not, configure connections to unused binary outputs, for test
purposes.
136
and inject voltage in one of the phases accordingly by keeping constant
1 to create phase-to-earth fault and thereby, I0CHECK will be activated
4 and 5 must be performed before the expiration of set time delay of
in this chapter.
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tR2 , the output START will disappear.
"Testing the power swing detection logic
tEF , the condition will be seen as power
TESTMODE setting to Off .
"Requirements"
Transformer protection RET670
1MRK 504 165-UEN E
GUID-57CCED5D-BDE5-4B79-A741-DFA4DB7D29EA v1
tEF . There
M13888-99 v5
M14946-2 v4
and section
Commissioning manual