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18 R/F CONVERTER (RFC)
RFC Ch.n Time Base Counter Low and High Registers
Register name
Bit
RFCnTCL
15–0 TC[15:0]
RFCnTCH
15–8 –
7–0 TC[23:16]
Or
Register name
Bit
RFCnTCL
31–24 –
RFCnTCH
23–0 TC[23:0]
Bits 31–24 Reserved
Bits 23–0 TC[23:0]
Time base counter data can be read and written through these bits.
Note: The time base counter must be set from the low-order value (RFCnTCL.TC[15:0] bits) first when
data is set using a 16-bit access instruction. The counter may not be set to the correct value if
the high-order value (RFCnTCH.TC[23:16] bits) is written first.
RFC Ch.n Interrupt Flag Register
Register name
Bit
RFCnINTF
15–8 –
7–5 –
4
3
2
1
0
Bits 15–5 Reserved
Bit 4
OVTCIF
Bit 3
OVMCIF
Bit 2
ESENBIF
Bit 1
ESENAIF
Bit 0
EREFIF
These bits indicate the RFC interrupt cause occurrence status.
1 (R):
Cause of interrupt occurred
0 (R):
No cause of interrupt occurred
1 (W):
Clear flag
0 (W):
Ineffective
The following shows the correspondence between the bit and interrupt:
RFCnINTF.OVTCIF bit: Time base counter overflow error interrupt
RFCnINTF.OVMCIF bit: Measurement counter overflow error interrupt
RFCnINTF.ESENBIF bit: Sensor B oscillation completion interrupt
RFCnINTF.ESENAIF bit: Sensor A oscillation completion interrupt
RFCnINTF.EREFIF bit:
18-10
Bit name
Initial
0x0000
0x00
0x00
Bit name
Initial
0x00
0x000000
Bit name
Initial
0x00
0x0
OVTCIF
0
OVMCIF
0
ESENBIF
0
ESENAIF
0
EREFIF
0
Reference oscillation completion interrupt
Seiko Epson Corporation
Reset
R/W
H0
R/W
–
–
R
–
H0
R/W
Reset
R/W
–
R
–
H0
R/W
Reset
R/W
–
R
–
–
R
H0
R/W
Cleared by writing 1.
H0
R/W
H0
R/W
H0
R/W
H0
R/W
S1C17W15 TECHNICAL MANUAL
Remarks
Remarks
Remarks
(Rev. 1.3)
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