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17 LCD DRIVER (LCD8B)
Bit 2
DSPAR
This bit switches the display area in the display data RAM.
1 (R/W): Display area 1
0 (R/W): Display area 0
Bits 1–0
DSPC[1:0]
These bits control the LCD display on/off and select a display mode. For more information, refer to
"Display On/Off."
LCD8B COM Pin Control Register 0
Register name
Bit
LCD8COMC0
15–8 –
7
6
5
4
3
2
1
0
Bits 15–8 Reserved
Bits 7–0
COMxDEN
These bits configure the partial drive of the COMx pins.
1 (R/W): Normal output
0 (R/W): Off waveform output
LCD8B Interrupt Flag Register
Register name
Bit
LCD8INTF
15–8 –
7–1 –
0
Bits 15–1 Reserved
Bit 0
FRMIF
This bit indicates the frame interrupt cause occurrence status.
1 (R):
Cause of interrupt occurred
0 (R):
No cause of interrupt occurred
1 (W):
Clear flag
0 (W):
Ineffective
LCD8B Interrupt Enable Register
Register name
Bit
LCD8INTE
15–8 –
7–1 –
0
Bits 15–1 Reserved
Bit 0
FRMIE
This bit enables the frame interrupt.
1 (R/W): Enable interrupt
0 (R/W): Disable interrupt
17-22
Bit name
Initial
0x00
COM7DEN
1
COM6DEN
1
COM5DEN
1
COM4DEN
1
COM3DEN
1
COM2DEN
1
COM1DEN
1
COM0DEN
1
Bit name
Initial
0x00
0x00
FRMIF
0
Bit name
Initial
0x00
0x00
FRMIE
0
Seiko Epson Corporation
Reset
R/W
–
R
–
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
Reset
R/W
–
R
–
–
R
H0
R/W
Cleared by writing 1.
Reset
R/W
–
R
–
–
R
H0
R/W
S1C17W15 TECHNICAL MANUAL
Remarks
Remarks
Remarks
(Rev. 1.3)
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