Evaluation Board Hardware; Rf Output Stages - Analog Devices EV-ADF4360-7EB1Z User Manual

Evaluation Board User Guide

EVALUATION BOARD HARDWARE

The evaluation board comes with a cable to connect to the
USB port of a PC. The silkscreen and cable diagram for the
evaluation board are shown in Figure 2. The board schematics
are shown in Figure 11 through Figure 13.
Figure 2. Evaluation Board Silkscreen—Top View
The board is powered from a single 9 V battery, or from the
USB supply, by changing the position of Switch SW1. All com-
ponents necessary for LO generation are catered for on-board. A
10 MHz TCXO from Fox Electronics provides the necessary
reference input. Otherwise, an external reference signal can
be connected via J3. (Remove power and signal from the TCXO
by removing Resistors R4 and R5). The PLL comprises the
ADF4360-7BCPZ and a passive loop filter. The VCO output
from RF A is available through the standard SMA Connector
OUT
J1 and the complementary RF
from J2.
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B VCO output is available
OUT
Users may provide their own power supplies using the J4 and J5
connectors, as shown in Figure 2. Hardware power-down using
the CE pin can be controlled by inserting an SMA connector
into J6 and removing R12.
The on-board filter is a third-order, passive, low-pass filter.
The filter contains three capacitors (C13, C14, and C15) plus
two resistors (R10 and R11). The footprint for R10 is located on
the underside of the board. The design parameters for the loop
filter are for a center frequency of 900 MHz, a PFD frequency
of 200 kHz, and a low-pass filter bandwidth of 10 kHz. To design a
filter for different frequency setups, use the
software.

RF OUTPUT STAGES

The output stage of the board allows users to insert a tuned load
for a particular frequency. The particular network inserted in
the board is optimized for 900 MHz operation. For different
frequencies, the output stage needs different component values.
Refer to the ADF4360-7
doubt, use a 50 Ω resistor instead of the shunt inductor, a 100 pF
bypass capacitor, and a 0 Ω resistor instead of the series inductor.
It is important that the same components be placed on the
RF A and RF
OUT OUT
outputs be terminated with 50 Ω loads. Otherwise, the output
power is not optimum, and in some cases, the part may
malfunction.
Rev. B | Page 3 of 16
ADIsimPLL
data sheet for further information. If in
B lines. In addition, it is essential that both
UG-104
simulation